Add trace logs to interrupt handlers

Signed-off-by: matsi <matsi@example.org>
Modify virtual and physical address assignments for GPIO peripherals

Modify virtual and physical address assignments for GPIO5 block. We have to
make it work with simple first-level IPU MMU configuration implemented in
U-Boot, where each entry addresses 1MB section aligned to 1MB.

Signed-off-by: matsi <matsi@example.org>
Minor changes

- stop the second core from the start
- increase blink period

Signed-off-by: matsi <matsi@example.org>