Correctly enable MSA and FR for user-mode

The FR bit is a critical part of ABI handling as it dictates the
size of floating-point registers.  For user-mode emulation each ABI
has a well-defined requirement for FR to be 0 or 1.  Until the
addition of FPXX ABI extensions O32 could only execute with FR=0.
With .MIPS.abiflags information then some applications can run in
FR=1 mode. Therefore FR must not be forced to 1.

MSA can however be unconditionally enabled as it will remain unusable
until FR=1.