mako_hotplug: queue suspend/resume works back to the dedicated workqueue.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: idle: Use ARM suspend/resume APIs to restore during warmboot

ARM generic cpu_suspend/resume APIs restore the necessary CP15 registers
to a known state when resuming from a reset state. Use of generic
suspend/resume APIs allows the msm warmboot code to not care about
restoring core registers used by ARM kernel. Also, the PM subsystem no
longer needs to allocate page table or uncached memory to save CPU
registers.

While at it convert most of the assembler code into respective C
function except for warmboot code that executes with MMU turned off.
Also, the idle subsystem no longer needs to manage a  page table or
uncached memory to save CPU registers.

Change-Id: I78a75d0a3c703390eec476199c7ca2786360e12a
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ARM: mm: implement LoUIS API for cache maintenance ops

ARM v7 architecture introduced the concept of cache levels and related
control registers. New processors like A7 and A15 embed an L2 unified cache
controller that becomes part of the cache level hierarchy. Some operations in
the kernel like cpu_suspend and __cpu_disable do not require a flush of the
entire cache hierarchy to DRAM but just the cache levels belonging to the
Level of Unification Inner Shareable (LoUIS), which in most of ARM v7 systems
correspond to L1.

The current cache flushing API used in cpu_suspend and __cpu_disable,
flush_cache_all(), ends up flushing the whole cache hierarchy since for
v7 it cleans and invalidates all cache levels up to Level of Coherency
(LoC) which cripples system performance when used in hot paths like hotplug
and cpuidle.

Therefore a new kernel cache maintenance API must be added to cope with
latest ARM system requirements.

This patch adds flush_cache_louis() to the ARM kernel cache maintenance API.

This function cleans and invalidates all data cache levels up to the
Level of Unification Inner Shareable (LoUIS) and invalidates the instruction
cache for processors that support it (> v7).

This patch also creates an alias of the cache LoUIS function to flush_kern_all
for all processor versions prior to v7, so that the current cache flushing
behaviour is unchanged for those processors.

v7 cache maintenance code implements a cache LoUIS function that cleans and
invalidates the D-cache up to LoUIS and invalidates the I-cache, according
to the new API.

Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>

Change-Id: I561c3b187b5b87b25de07ea82a4ef73a42761e27
Signed-off-by: Karthik Parsha <kparsha@codeaurora.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ARM: kernel: update cpu_suspend code to use cache LoUIS operations

In processors like A15/A7 L2 cache is unified and integrated within the
processor cache hierarchy, so that it is not considered an outer cache
anymore. For processors like A15/A7 flush_cache_all() ends up cleaning
all cache levels up to Level of Coherency (LoC) that includes
the L2 unified cache.

When a single CPU is suspended (CPU idle) a complete L2 clean is not
required, so generic cpu_suspend code must clean the data cache using the
newly introduced cache LoUIS function.

The context and stack pointer (context pointer) are cleaned to main memory
using cache area functions that operate on MVA and guarantee that the data
is written back to main memory (perform cache cleaning up to the Point of
Coherency - PoC) so that the processor can fetch the context when the MMU
is off in the cpu_resume code path.

outer_cache management remains unchanged.

Change-Id: Id5a6d34d55d1b0a5ef112cafc3ad21c0da4b0b84
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API

When a CPU is hotplugged out caches that reside in its power domain
lose their contents and so must be cleaned to the next memory level.

Currently, __cpu_disable calls flush_cache_all() that for new generation
processor like A15/A7 ends up cleaning and invalidating all cache levels
up to Level of Coherency, which includes the unified L2.

This ends up being a waste of cycles since the L2 cache contents are not
lost on power down.

This patch updates __cpu_disable to use the new LoUIS API cache operations.

Acked-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ARM: mm: update __v7_setup() to the new LoUIS cache maintenance API

The ARMv7 processor setup function __v7_setup() cleans and invalidates the
CPU cache before enabling MMU to start the CPU with a clean CPU local cache.

But on ARMv7 architectures like Cortex-[A15/A8], this code will end
up flushing the L2 caches(up to level of Coherency) which is undesirable
and expensive. The setup functions are used in the CPU hotplug scenario too
and hence flushing all cache levels should be avoided.

This patch replaces the cache flushing call with the newly introduced
v7 dcache LoUIS API where only cache levels up to LoUIS are cleaned and
invalidated when a processors executes __v7_setup which is the expected
behavior.

For processors like A9 and A5 where the L2 cache is an outer one the
behavior should be unchanged.

Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: thermal: remove unused routines.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
msm: bam_dmux: increase min/max sleep usecs. Remove spinlocks around the wake_lock/unlock and use an atomic variable instead to protect wakelock_reference_count.

Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
staging: android: lowmemorykiller: select a new task to kill

Under certain circumstances, a process may take time to handle a SIGKILL.
When lowmemkiller is called again shortly after, it would pick the same
process to kill over and over, so that we cann't get free memory for long time.

Solution is to check fatal_signal_pending() on the selected task, and if it's
already pending, select a new task to kill.

Cherry-pick 5e3358093351e5d48e21250e31896b855542f22c
Reviewed-on: http://gerrit.pcs.mot.com/479831

Change-Id: I53445114451ffaba293f3c7174fb0b01ed0d34b6
Signed-off-by: Tianshui Shi <kfp634@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/505410
Tested-by: Jira Key <JIRAKEY@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Reviewed-by: Jason Hrycay <jason.hrycay@motorola.com>
Reviewed-by: Jeffrey Carlyle <jeff.carlyle@motorola.com>
(cherry picked from commit da093001caf06ed2296b4f79c84cc48ce713eac6)
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
trace: memkill: trace LMK and OOM kills

How to enable tracer:

  # mount -t debugfs nodev /sys/kernel/debug
  # echo 1 > /sys/kernel/debug/tracing/tracing_on
  # echo 1 > /sys/kernel/debug/tracing/events/memkill/enable
  # cat /sys/kernel/debug/tracing/trace

Event format:

  oom_kill: <pid> <comm> <total_vm> <anon_rss> <file_rss> <oom_score_adj> <order> <points> <cached> <freeswap>
  oom_kill_shared: <pid> <comm>
  lmk_kill: <pid> <comm> <selected_oom_adj> <selected_tasksize> <min_adj> <cached> <freeswap>

Change-Id: Ic45e181c62aead9b19d2a40363217f9220896096
Signed-off-by: Jeffrey Carlyle <jeff.carlyle@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/480746
Reviewed-on: http://gerrit.pcs.mot.com/513174
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Jason Hrycay <jason.hrycay@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Thirumarai Selvi S <a16462@motorola.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Reviewed-by: Christopher Fries <qcf001@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit ef733ddfbb73cd33daf36720fa474ce4c8acb1f7)
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
trace: allow memkill tracing to be selectively enabled

Change-Id: I8a50d6b121192b0dc94e2a9a0e05246a47045e81
Signed-off-by: Jeffrey Carlyle <jeff.carlyle@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/482673
Reviewed-on: http://gerrit.pcs.mot.com/513906
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Thirumarai Selvi S <a16462@motorola.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit fd9bd32cd8f005b0d2f6438935fdd0bc9654c938)
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
trace: memkill: per-zone page state for LMK

LMK considers memory status per zone. This change appends
gfp mask and per-zone free/file page state to LMK kill tracing.
A field <Node_id>:<Zone_id>:<Nr_free>:<Nr_page> is printed for
each zone.

Change-Id: I9627e5f486b1c32217c7d701fdaa7d05671c006b
Signed-off-by: Yuanyuan Zhong <a6510c@motorola.com>
(cherry picked from commit 2e59bf04b7634d3a9e28d088cb103f8d5fc18504)
Signed-off-by: Jeffrey Carlyle <jeff.carlyle@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
trace: memkill: provide fixed zone info columns.

Maintain kernel trace log to always have fixed number of columns.

propagated_from: (CR)

Signed-off-by: Yi-wei Zhao <gbjc64@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/537078
SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: David Ding <dding@motorola.com>
Reviewed-by: Dong-Dong Yang <gdb746@motorola.com>
Reviewed-by: Jeff Thompson <jthomps1@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
(cherry picked from commit 8ac598bee92a14659b58f6ebaae4b3179fcc7e01)

Change-Id: I3e4ab2d5499a0f008b55bf3210fb40e234abc4a3
Reviewed-on: http://gerrit.pcs.mot.com/548484
SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Reviewed-by: Jason Hrycay <jason.hrycay@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
staging: android: lowmemorykiller: implement task's adj rbtree

Based on the current LMK implementation, LMK has to scan all processes to
select the correct task to kill during low memory.
The basic idea for the optimization is to :
queue all tasks with oom_score_adj priority, and then LMK just selects the
proper task from the queue(rbtree) to kill.

performance improvement:
the current implementation: average time to find a task to kill : 1004us
the optimized implementation: average time to find a task to kill: 43us

Change-Id: I4dbbdd5673314dbbdabb71c3eff0dc229ce4ea91
Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/548917
SLT-Approved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
staging: android: lmk: check free memory when tasks switch to background

Add more free-memory check point.
This patch trigger low memory killer to scan free memory when a process is moved
to background task groups.

Change-Id: If50eef2fb2c05f57ab808f95a9408204058f4f9b
Signed-off-by: Hong-Mei Li <a21834@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/557973
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
SLTApproved: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
staging: android: lmk: skip if killed by lmk

A task can be selected to kill when it's already exiting. Sending
signal to the task at that state won't set TIF_SIGPENDING for it.
After that, every task including threads in the exiting task itself
running into lmk will compete for the mutex, then spend some time
waiting for the exiting task to release memory or try to send signal
to the same task again.
We want the exiting task to exit as early as possible but it's slowed
down greatly by the mutex and waiting. Skip lmk if current thread
group leader is exiting and is killed by lmk. Also delegate TIF_MEMDIE
to current task.

Change-Id: Id7839b81f183165871976666bfd4e04130a00610
Signed-off-by: Yuanyuan Zhong <zyy@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/584015
SLTApproved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Check Patch <CHEKPACH@motorola.com>
Reviewed-by: Klocwork kwcheck <klocwork-kwcheck@sourceforge.mot.com>
Reviewed-by: Russell Knize <rknize@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
staging: android: lmk: check TIF directly

When trying to fix that lmk can't kill an exiting task
(commit 895304e926352e0272964a421bd6271e47616ab3
(CR) staging: android: lmk: skip if killed by lmk),
additional check was added for the TIF_MEMDIE flag.
However the task lock has already been taken when examining
the task. The same helper function which tries to grab the
task lock again will be deadlocked.
Change to check the thread flag of thread group leader directly.

Change-Id: If1f880aaca2f053a54ab38c62f275f0a714eb5d2
Signed-off-by: Yuanyuan Zhong <zyy@motorola.com>
Reviewed-on: http://gerrit.pcs.mot.com/587751
SLTApproved: Slta Waiver <sltawvr@motorola.com>
Tested-by: Jira Key <jirakey@motorola.com>
Reviewed-by: Yi-Wei Zhao <gbjc64@motorola.com>
Submit-Approved: Jira Key <jirakey@motorola.com>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ASoC: compress: Update lock for dpcm calls

Compress driver calls into the dpcm framework when
usecase is started/stopped.When calling dpcm framework
api's it should acquire dpcm mutex.
This change replaces the card mutex with dpcm mutex when
dpcm apis are called.

CRs-fixed: 596103
Change-Id: I66abb823e07a0d7eb5d9687927526d785959410f
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ASoC: msm: hold lock while allocating and freeing ASM clients

ASM client allocation and free have to happen atomically to avoid
ASM APR being in wrong state. So hold lock while allocating and freeing
ASM clients.

CRs-Fixed: 554249

Change-Id: Ie6d2e87445cc06de990c9e8bed6dbf88ac79cd3a
Signed-off-by: Kiran Kandi <kkandi@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
ASoC: msm: qdsp6v2: clear old memhandle list when SSR happens

When SSR triggers, ASM gets RESET_EVENT callback.
Clear custom topology related old memhandle list here.
Otherwise for next ASM session opened after SSR,
old memhandle is sent to DSP and result in no audio.
Also, for ASM session while unmap during SSR, APR
command fail is expected, even then go ahead and
clear old mem handles relating to session.
Add changes to clear it from list.

CRs-Fixed: 592823, 589762, 592580, 590719, 589450, 593497
Change-Id: I10fc8190e929c7a4a344b1d393233e6cbcfcee97
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>