CMake: Add libm to list of system libs printed by llvm-config.

This is required by the interpreter library, and also matches the autoconf
behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221147 91177308-0d34-0410-b5e6-96231b3b80d8
Test commit.

Fixes two typos.

Change-Id: I129f647de8933e1d8f0dc9941bcb91602edce7e2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221148 91177308-0d34-0410-b5e6-96231b3b80d8
[OCaml] Fix mismatched CAMLparam/CAMLreturn.

Also, revert r221142--it was an incorrect fix to this bug
which fixed tests by accident.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221149 91177308-0d34-0410-b5e6-96231b3b80d8
Emit .eh_frame with relocations to functions, rather than sections

When LLVM emits DWARF call frame information, it currently creates a local,
section-relative symbol in the code section, which is pointed to by a
relocation on the .eh_frame section. However, for C++ we emit some functions in
section groups, and the SysV ABI has some rules to make it easier to remove
these sections
(http://www.sco.com/developers/gabi/latest/ch4.sheader.html#section_group_rules):

  A symbol table entry with STB_LOCAL binding that is defined relative to one
  of a group's sections, and that is contained in a symbol table section that is
  not part of the group, must be discarded if the group members are discarded.
  References to this symbol table entry from outside the group are not allowed.

This means that we need to use the function symbol for the relocation, not a
temporary symbol.

There was a comment in the code claiming that the local symbol was used to
avoid creating a relocation, but a relocation must be created anyway as the
code and CFI are in different sections.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221150 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r221150, as it broke sanitizer tests


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221151 91177308-0d34-0410-b5e6-96231b3b80d8
Add CRLF support to LineIterator.

The MRI scripts have to work with CRLF, and in general it is probably
a good idea to support this in a core utility like LineIterator.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221153 91177308-0d34-0410-b5e6-96231b3b80d8
Merge the directive-eabi_attribute.s and directive-eabi_attribute-2.s tests.

test/MC/ARM/directive-eabi_attribute.s had gotten out-of-sync with
test/MC/ARM/directive-eabi_attribute-2.s. The former tests the encoding of
build attributes in object files, and the latter the encoding in assembly
files. Since both these tests need to be updated at the same time, it makes
sense to combine them into a single test. The object file encodings are being
checked against the ouput of -arm-attributes rather than by direct byte
comparisons which makes for easier reading.

Change-Id: I0075de506ae5626fb2fa235383fe5ce6a65a15a9

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221155 91177308-0d34-0410-b5e6-96231b3b80d8
Handle ctor/init_array initialization.

Hexagon was not calling InitializeELF and could not select between
ctors and init_array.

Phabricator revision: http://reviews.llvm.org/D6061

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221156 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Fix miscompile of comparison with 0xffffffffffffffff

Some literals in the AArch64 backend had 15 'f's rather than 16, causing
comparisons with a constant 0xffffffffffffffff to be miscompiled.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221157 91177308-0d34-0410-b5e6-96231b3b80d8
Sink DwarfUnit::CURanges into DwarfCompileUnit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221161 91177308-0d34-0410-b5e6-96231b3b80d8
Cleanup some unused or trivial functions in DwarfCompileUnit

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221164 91177308-0d34-0410-b5e6-96231b3b80d8
Remove the cortex-a9-mp CPU.

This CPU definition is redundant. The Cortex-A9 is defined as
supporting multiprocessing extensions. Remove its definition and
update appropriate tests.

LLVM defines both a cortex-a9 CPU and a cortex-a9-mp CPU. The only
difference between the two CPU definitions in ARM.td is that
cortex-a9-mp contains the feature FeatureMP for multiprocessing
extensions.

This is redundant since the Cortex-A9 is defined as having
multiprocessing extensions in the TRMs. armcc also defines the
Cortex-A9 as having multiprocessing extensions by default.

Change-Id: Ifcadaa6c322be0a33d9d2a39cfdd7da1d75981a7

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221166 91177308-0d34-0410-b5e6-96231b3b80d8
IR: MDNode => Value: Instruction::getAllMetadataOtherThanDebugLoc()

Change `Instruction::getAllMetadataOtherThanDebugLoc()` from a vector of
`MDNode` to one of `Value`.  Part of PR21433.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221167 91177308-0d34-0410-b5e6-96231b3b80d8
Normally an 'optnone' function goes through fast-isel, which does not
call DAGCombiner. But we ran into a case (on Windows) where the
calling convention causes argument lowering to bail out of fast-isel,
and we end up in CodeGenAndEmitDAG() which does run DAGCombiner.
So, we need to make DAGCombiner check for 'optnone' after all.

Commit includes the test that found this, plus another one that got
missed in the original optnone work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221168 91177308-0d34-0410-b5e6-96231b3b80d8
Relax the LLVM_NOEXCEPT _MSC_VER version check back to 1900

Unconditional noexcept support was added in the VS 2013 Nov CTP. Given
that there have been three CTPs since then, I don't think we need
careful macro magic to target that specific tech preview. Instead,
target the major release version number of 1900, which corresponds to
the as-yet unreleased VS "14".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221169 91177308-0d34-0410-b5e6-96231b3b80d8
[Reassociate] Canonicalize negative constants out of expressions.

This gives CSE/GVN more options to eliminate duplicate expressions.
This is a follow up patch to http://reviews.llvm.org/D4904.

http://reviews.llvm.org/D5363

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221171 91177308-0d34-0410-b5e6-96231b3b80d8
Reapply: R600: Make sure to inline all internal functions

Function calls aren't supported yet.

This was reverted due to build breakages, which should be fixed now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221173 91177308-0d34-0410-b5e6-96231b3b80d8
EarlyCSE should ignore calls to @llvm.assume

EarlyCSE uses a simple generation scheme for handling memory-based
dependencies, and calls to @llvm.assume (which are marked as writing to memory
to ensure the preservation of control dependencies) disturb that scheme
unnecessarily. Skipping calls to @llvm.assume is legal, and the alternative
(adding AA calls in EarlyCSE) is likely undesirable (we have GVN for that).

Fixes PR21448.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221175 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] 8bit divrem: Improve codegen for AH register extraction.

For 8-bit divrems where the remainder is used, we used to generate:
    divb  %sil
    shrw  $8, %ax
    movzbl  %al, %eax

That was to avoid an H-reg access, which is problematic mainly because
it isn't possible in REX-prefixed instructions.

This patch optimizes that to:
    divb  %sil
    movzbl  %ah, %eax

To do that, we explicitly extend AH, and extract the L-subreg in the
resulting register.  The extension is done using the NOREX variants of
MOVZX.  To support signed operations, MOVSX_NOREX is also added.
Further, this introduces a new SDNode type, [us]divrem_ext_hreg, which is
then lowered to a sequence containing a single zext (rather than 2).

Differential Revision: http://reviews.llvm.org/D6064


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221176 91177308-0d34-0410-b5e6-96231b3b80d8
MSVC requires redeclarations to repeat noexcept

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221177 91177308-0d34-0410-b5e6-96231b3b80d8