iio: ad9122: Fix ref clock setup

By using clk_get_rate() instead of clk_round_rate() we are always stuck with
the same frequency and can not change it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
drivers/iio/frequency/ad9523.c: default m1 and m2 div with non zero values

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361.c: Fix write priv on trx_rate_governor

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Fix low sample rate decimating FIR disable case

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361.c: Restore HDL loopback for HDL Version > 7

FIXME: subject to change

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>