Use kernel cacheflush for large sizes on MIPS.

This is a workaround to a deserializer bug. The bug was exposed
with a recent optimization to use user-mode cache-flushing on
MIPS. To reduce risk, we're doing a workaround in mips-specific
code so that other arch's cannot be affected.

The deserializer does this FlushICache:

  CPU::FlushICache(last_object_address_, Page::kPageSize);

However, that region includes OS guard-pages with no access
privilege. The MIPS kernel cacheflush routines work OK in this
case, but the Bionic cacheflush recently enabled user-mode flushing
using the synci instruction, which causes a segfault on MIPS when
the guard pages are reached.
(change I48fd6f2b0cbe80c3cd90f453ced97a2f154f7ad3)

The workaround just reverts to the kernel flush when the size
is Page::kPageSize or bigger.

A better fix would be to alter the deserializer so that only the
executable pages are flushed:
  CPU::FlushICache(last_object_address_,
                   isolate_->memory_allocator()->CodePageAreaSize());

However, that changes common code for all supported architectures.
There is no evidence that this bug affects the other arch's, so we
are doing a MIPS-specific workaround.

BUG=

Review URL: https://codereview.chromium.org/14863007
Patch from Paul Lind <plind44@gmail.com>.

git-svn-id: https://v8.googlecode.com/svn/branches/3.9@14579 ce2b1a6d-e550-0410-aec6-3dcde31c8c00