Merge pull request #3 from QuickJack/master

Fixes read access in synchronous burst mode
updated with longer read cycle to let cycle complete on the FPGA side
Merge branch 'master' of https://github.com/fpga-logi/Logi-kernel
Merge pull request #4 from QuickJack/master

DMA fix to significantly reduce CPU load
Merge pull request #6 from QuickJack/master

Removed string constants that had been hacked directly into the code
Merge pull request #7 from QuickJack/master

Changed project structure to prevent code dupilcates
Merge pull request #8 from QuickJack/master

Fixed dependency issues
Merge pull request #9 from QuickJack/master

Corrected I2C address
small modification on the DMA module
Merge branch 'master' of https://github.com/fpga-logi/Logi-kernel

Conflicts:
	beaglebone-black/logibone_ra2/logibone_ra2_dma.c