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Merge remote-tracking branch 'gnu/binutils-2_24-branch' into 2.24
Error on shared lib call to @local ifunc

On powerpc32, making ifuncs have non-default visibility in shared
libraries or pies can result in runtime failures.  The problem is that
if gcc is told that a given function has non-default visibility, then
calls to that function are assumed to be local (which is true) and
thus need not go via a plt call stub (which is false for ifunc).  If
the caller has no other reason to set up the got pointer (r30), code
won't be emitted to do so.  However, a pic plt call stub makes use of
r30 to load the plt entry.  So a call to an ifunc, which always needs
a plt entry, will fail.

This patch makes ld emit an error for the problem case, and allows
calls to non-default visibility ifuncs to work in normal executables.
I also fix some cases where ifuncs fail when using the old bss-plt.

	* elf32-ppc.c (ppc_elf_check_relocs): For @local call to ifunc,
	error when shared and force a plt call otherwise.
	(ppc_elf_size_dynamic_sections): Don't emit DT_PPC_GOT unless
	plt_type == PLT_NEW.
	(ppc_elf_relocate_section): Add missing test to resolve ifuncs to
	the appropriate call stub.
Mark symbol in executables if it matches dynamic_list

bfd/

	PR gold/16530
	* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Mark symbol in
	executables if it matches dynamic_list.

ld/testsuite/

	PR gold/16530
	* ld-elf/dynamic-1.c: New file.
	* ld-elf/dynamic-1.rd: Likewise.
	* ld-elf/dynamic-1.syms: Likewise.

	* ld-elf/shared.exp (build_tests): Add dynamic-1.
PR15530, mark symbol in executables if it matches dynamic_list

For powerpc64 as HJ did earlier for other ELF targets, and a tidy.

	PR gold/15530
	* elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref): Support
	--export-dynamic and --dynamic-list marking of symbols.
	* elflink.c (bfd_elf_gc_mark_dynamic_ref_symbol): Reorder
	cheap tests first.
Consolidate ppc64 ld/bfd communication

Moves assorted variables used to communicate between ld and bfd into
a struct, hooks it into the bfd link_hash_table early, and removes
all other places where such variables were passed piecemeal.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Define.
	(ppc64_elf_init_stub_bfd, ppc64_elf_edit_opd, ppc64_elf_tls_setup,
	ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
	ppc64_elf_build_stubs): Update prototype.
	* elf64-ppp.c (struct ppc_link_hash_table): Add params, delete other
	fields now in params.  Adjust code throughout file.
	(ppc64_elf_init_stub_bfd): Delete "abfd" parameter, add "params".
	Save params pointer in htab.
	(ppc64_elf_edit_opd, ppc64_elf_tls_setup,
	ppc64_elf_setup_section_lists, ppc64_elf_size_stubs,
	ppc64_elf_build_stubs): Remove parameters now in "params".
ld/
	* emultemps/ppc64elf.em (params): New static struct replacing
	various other static vars.  Adjust code throughout file.
Control powerpc64-ld provision of register save/restore

This patch allows the user to override powerpc64-ld's default for
providing linker generated register save and restore functions as used
by gcc -Os code.  Normally these are not provided by ld -r, so Linux
kernel modules have needed to include their own copies.

bfd/
	* elf64-ppc.h (struct ppc64_elf_params): Add save_restore_funcs.
	* elf64-ppc.c (ppc64_elf_func_desc_adjust): Use it to control
	provision of out-of-line register save/restore routines.
ld/
	* emultempl/ppc64elf.em (params): Init new field.
	(ppc_create_output_section_statements): Set params.save_restore_funcs
	default.
	(PARSE_AND_LIST_*): Add support for --save-restore-funcs and
	--no-save-restore-funcs.
Better overflow checking for powerpc64 relocations

R_PPC64_ADDR16 is used in three contexts:
- .short data relocation
- 16-bit signed insn fields, eg. addi
- 16-bit unsigned insn fields, eg. ori
In the first case we want to allow both signed and unsigned 16-bit
values, the latter two ought to error if the field exceeds the range
of values allowed for 16-bit signed and unsigned integers
respectively.  These conflicting requirements meant that ld had to
choose the least restrictive overflow checks, and thus it is possible
to construct testcases where an addi field overflows but is not
reported by ld.  Many relocations dealing with 16-bit insn fields have
this problem.  What's more, some relocations that are only ever used
for signed fields of instructions woodenly copied the lax overflow
checking of R_PPC64_ADDR16.

bfd/
	* elf64-ppc.c (ppc64_elf_howto_raw): Use complain_overflow_signed
	for R_PPC64_ADDR14, R_PPC64_ADDR14_BRTAKEN, R_PPC64_ADDR14_BRNTAKEN,
	R_PPC64_SECTOFF, R_PPC64_ADDR16_DS, R_PPC64_SECTOFF_DS,
	R_PPC64_REL16 entries.  Use complain_overflow_dont for R_PPC64_TOC.
	(ppc64_elf_relocate_section): Modify overflow test for 16-bit
	fields in instructions to signed/unsigned according to whether
	the field takes a signed or unsigned value.
gold/
	* powerpc.cc (Powerpc_relocate_functions::Overflow_check): Add
	CHECK_UNSIGNED, CHECK_LOW_INSN, CHECK_HIGH_INSN.
	(Powerpc_relocate_functions::has_overflow_unsigned): New function.
	(Powerpc_relocate_functions::has_overflow_bitfield,
	overflowed): Use the above.
	(Target_powerpc::Relocate::relocate): Correct overflow checking
	for a number of relocations.  Modify overflow test for 16-bit
	fields in instructions to signed/unsigned according to whether
	the field takes a signed or unsigned value.
Better overflow checking for powerpc32 relocations

Similar to the powerpc64 patch, this improves overflow checking in
elf32-ppc.c.  Many reloc "howto" entries needed fixes, some just
cosmetic.

The patch also fixes the R_PPC_VLE_SDA21 reloc application code, which
was horribly broken.  In fact, it may still be broken since Power ISA
2.07 says e_li behaves as
   RT <- EXTS(li20 1:4 || li20 5:8 || li20 0 || li20 9:19)
where li20 is a field taken from bits 17..20, 11..15, 21..31 of the
instruction.  Freescale VLEPEM says differently, and I assume
correctly, that
   RT <- EXTS(li20 0:3 || li20 4:8 || li20 9:19)
The VLE_SDA21 relocation description matches this too.

Now the VLE_SDA21 relocation specifies in the case where e_addi16 is
converted to e_li for symbols in .PPC.EMB.sdata0 or .PPC.EMB.sbss0
(no base register), that the field is restricted to 16 bits, with the
sign bit being propagated to the top 4 bits.  I don't see the sense in
restricting the value like this, so have allowed the full 20 bit
signed value.  This of course is compatible with the reloc description
in that values in the 16 bit signed range will result in exactly the
same insn field as when the reloc description is followed to the
letter.

	* elf32-ppc.c (ppc_elf_howto_raw): Correct overflow check for
	many relocations.  Correct bitsize and rightshift too for a number
	of VLE relocs.  Describe R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO.
	Correct dst_mask on R_PPC_VLE_SDA21_LO.
	(ppc_elf_vle_split16): Tidy, delete unnecessary prototype.
	(ppc_elf_relocate_section): Modify overflow test for 16-bit
	fields in instructions to signed/unsigned according to whether
	the field takes a signed or unsigned value.  Tidy vle split16 code.
	Correct R_PPC_VLE_SDA21 and R_PPC_VLE_SDA21_LO handling.