Generate extract for in-tree uses if the use is scalar operand in vectorized instruction. radar://18144665

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216946 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel] Provide the option to skip target-independent instruction selection. NFC.

This allows the target to disable target-independent instruction selection and
jump directly into the target-dependent instruction selection code.

This can be beneficial for targets, such as AArch64, which could emit much
better code, but never got a chance to do so, because the target-independent
instruction selector was able to find an instruction sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216947 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Move over to target-dependent instruction selection only.

This change moves FastISel for AArch64 to target-dependent instruction selection
only. This change replicates the existing target-independent behavior, therefore
there are no changes to the unit tests or new tests.

Future changes will take advantage of this change and update functionality
and unit tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216955 91177308-0d34-0410-b5e6-96231b3b80d8
Add a CFL Alias Analysis implementation

This provides an implementation of CFL alias analysis (including some
supporting data structures). Currently, we don't have any extremely fancy
features, sans some interprocedural analysis (i.e. no field sensitivity, etc.),
and we do best sitting behind BasicAA + TBAA. In such a configuration, we take
~0.6-0.8% of total compile time, and give ~7-8% NoAlias responses to queries
TBAA and BasicAA couldn't answer when bootstrapping LLVM. In testing this on
other projects, we've seen up to 10.5% of queries dropped by BasicAA+TBAA
answered with NoAlias by this algorithm.

Patch by George Burgess IV (with minor modifications by me -- mostly adapting
some BasicAA tests), thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216970 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Relax some ordering in tests.

This will help with enabling misched

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216971 91177308-0d34-0410-b5e6-96231b3b80d8
[asan]  Assign a low branch weight to ASan's slow path, patch by Jonas Wagner. This speeds up asan (at least on SPEC) by 1%-5% or more. Also fix lint in dfsan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216972 91177308-0d34-0410-b5e6-96231b3b80d8
BumpPtrAllocator: use uintptr_t when aligning addresses to avoid undefined behaviour

In theory, alignPtr() could push a pointer beyond the end of the current slab, making
comparisons with that pointer undefined behaviour. Use an integer type to avoid this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216973 91177308-0d34-0410-b5e6-96231b3b80d8
Add pass-manager flags to use CFL AA

Add -use-cfl-aa (and -use-cfl-aa-in-codegen) to add CFL AA in the default pass
managers (for easy testing).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216978 91177308-0d34-0410-b5e6-96231b3b80d8
[CFLAA] constexpr -> LLVM_CONSTEXPR

Attempt to fix the MSVC build by not using constexpr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216979 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Allow atomic operations using immediates to avoid using a register

The only valid lowering of atomic stores in the X86 backend was mov from
register to memory. As a result, storing an immediate required a useless copy
of the immediate in a register. Now these can be compiled as a simple mov.

Similarily, adding/and-ing/or-ing/xor-ing an
immediate to an atomic location (but through an atomic_store/atomic_load,
not a fetch_whatever intrinsic) can now make use of an 'add $imm, x(%rip)'
instead of using a register. And the same applies to inc/dec.

This second point matches the first issue identified in
  http://llvm.org/bugs/show_bug.cgi?id=17281

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216980 91177308-0d34-0410-b5e6-96231b3b80d8
[CFLAA] LLVM_CONSTEXPR -> const

The number is just a constant, and this should make MSVC happy (or at least
happier).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216981 91177308-0d34-0410-b5e6-96231b3b80d8
Reinstate "Nuke the old JIT."
Approved by Jim Grosbach, Lang Hames, Rafael Espindola.

This reinstates commits r215111, 215115, 215116, 215117, 215136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216982 91177308-0d34-0410-b5e6-96231b3b80d8
Nuke MCAnalysis.

The code is buggy and barely tested. It is also mostly boilerplate.
(This includes MCObjectDisassembler, which is the interface to that
functionality)

Following an IRC discussion with Jim Grosbach, it seems sensible to just
nuke the whole lot of functionality, and dig it up from VCS if
necessary (I hope not!).

All of this stuff appears to have been added in a huge patch dump (look
at the timeframe surrounding e.g. r182628) where almost every patch
seemed to be untested and not reviewed before being committed.
Post-review responses to the patches were never addressed. I don't think
any of it would have passed pre-commit review.

I doubt anyone is depending on this, since this code appears to be
extremely buggy. In limited testing that Michael Spencer and I did, we
couldn't find a single real-world object file that wouldn't crash the
CFG reconstruction stuff. The symbolizer stuff has O(n^2) behavior and
so is not much use to anyone anyway. It seemed simpler to remove them as
a whole. Most of this code is boilerplate, which is the only way it was
able to scrape by 60% coverage.

HEADSUP: Modules folks, some files I nuked were referenced from
include/llvm/module.modulemap; I just deleted the references. Hopefully
that is the right fix (one was a FIXME though!).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216983 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Use a new helper function to determine if a value type is supported. NFCI.

FastISel for AArch64 supports more value types than are actually legal. Use a
dedicated helper function to reflect this.

It is very similar to the isLoadStoreTypeLegal function, with the exception
that vector types are not supported yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216984 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Use the target-dependent selection code for shifts first.

This uses the target-dependent selection code for shifts first, which allows us
to create better code for shifts with immediates and sign-/zero-extend folding.

Vector type are not handled yet and the code falls back to target-independent
instruction selection for these cases.

This fixes rdar://problem/17907920.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216985 91177308-0d34-0410-b5e6-96231b3b80d8
[CFLAA] Remove tautological comparison

Fixes this (the warning is right, the unsigned value is not negative):
lib/Analysis/StratifiedSets.h:689:53: warning: comparison of unsigned expression >= 0 is always true [-Wtautological-compare]
  bool inbounds(StratifiedIndex N) const { return N >= 0 && N < Links.size(); }

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216987 91177308-0d34-0410-b5e6-96231b3b80d8
unique_ptrify passing the TargetMachine to ExecutionEngine::MCJITCtor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216988 91177308-0d34-0410-b5e6-96231b3b80d8
Only emit movw on ARMv6T2+

Fix PR18364.

Patch by Dimitry Andric.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216989 91177308-0d34-0410-b5e6-96231b3b80d8
Missing test from r216989

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216990 91177308-0d34-0410-b5e6-96231b3b80d8
[CFLAA] No initializer lists for MSVC

MSVC 2012 does not understand initializer lists; remove them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@216991 91177308-0d34-0410-b5e6-96231b3b80d8