msm: pm-8x60: Use generic clk apis during power collapse

The power management code calls in acpuclk code directly to switch to a
always on clock source during power collapse there by turning off the
HFPLL during any power collapse. The Krait clock management is switching
to use clocks ops model. To necessitate the change, the power management
code will register for CPU/L2 clock sources and disables the
corresponding clocks during power collapse.

Add a DT node to indicate if the clock sources are synchronized across
the cores/L2, to prevent querying on clock sources that might not be
available on certain targets. Also, clk_get() doesn't currently support
deferred probe, change the compile order to include pm-8x60 after clocks
driver to ensure that clock drivers get probed before pm-8x60.

Change-Id: I671296064dda93f1d2226e6ae059d827c4c00890
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: idle-v7: Separate PC termination for hotplug

When a core is power collapsed as a part of hotplug the state of the CPU
isn't restored and hence there isn't a need to save the registers. This
change is needed by a subsequent patch that will reserve a DMA memory to
save the register contents. The DMA memory region isn't available until
arch initcall and the kernel thermal module could hotplug a core for
thermal considerations.

CRs-fixed: 489391
Change-Id: Idf6ec5212482ccff91500edc4988516389189627
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: pm-8x60: Use dma_alloc_coherent for the saved region

dma_alloc_coherent is the linux standard way of allocating coherent
(i.e. uncached) memory. This API provides more guarantess than the
custom allocate_contiguous_ebi function, including the ability to
specify allocations from the lower 4G of memory. Switch to this API
for allocation of uncached memory. Because using dma_alloc_coherent
may have other setup involved, switch the setup function to be a
later initcall as well (from core_initcall to arch_initcall).

Change-Id: I96ea4575e5ee82ccbf7e691ba75ea1414dc6d81a
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: flar2 <asegaert@gmail.com>
Revert "msm: pm-8x60: Add PNOC request to prevent PNOC clk gating"

This reverts commit 9b186afca6c206ef1e74c138a10b75bdab4ba422.

Change-Id: Ifb0e0af69f6e63cae74ba2c50cb5d126257bc43d
Signed-off-by: Badhri Jagan Sridharan <badhris@codeaurora.org>
Signed-off-by: flar2 <asegaert@gmail.com>
arm/dt: msm8974: Enable support for configuring MPM interrupt

On 8974, DP and DM lines are routed to MPM for detecting data lines
transition during VDD minimization. Hence enable support for allowing
VDD minimization during host bus suspend and depend on MPM for usb
remote wakeup.

Change-Id: I18c8cd9cbeb7bd1767a54ef3c70b6392255e56c9
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: flar2 <asegaert@gmail.com>
disable crc check
msm: smd_tty: add new SMD TTY port

Add new port for exporting DATA4 (ATCoP) to userspace.

CRs-Fixed: 519977
Change-Id: I63f79788ff06a00c3aead4a725039ae14feb020f
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: smd_tty: add device tree support to smd_tty drivers

SMD TTY is configured using local tables that do not
allow customization on a per-target basis.

Add device tree support to configure SMD TTY devices.

Change-Id: Ie02dd63a0bec8edff77c8cbeeb72ae7331a0c67a
Signed-off-by: Arun Kumar Neelakantam <aneela@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: smd_tty: replace wake lock with wakeup source

Wake locks have been deprecated.

Remove deprecated wake lock calls and replace with wakeup sources and
power-management calls.

Change-Id: Ibb3d84ae20ed0af43254e46b344be8d86e97c717
Signed-off-by: Eric Holmberg <eholmber@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: rpm-smd: add missing kvp in sleep set

If there is a KVP that was not present in first sleepset
request and sent later, the same KVP is not updated to
the node in tree internally maintained

the kvp is added to the existing node

CRs-fixed: 546434
Change-Id: I43301f93fb48535e3d4a0833333568488a2c33d3
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: rpm-smd: use data type correctly for a variable

Change variable data type from signed int to unsigned int.

CRs-fixed: 556055
Change-Id: I6bb363b31d4fab26d84f89e775101c6051fe9e10
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
ARM: dts: msm: Add additional GDSC devices

Some targets have more GDSC. Add support for them.

Change-Id: I043b222105f069c7f7ba8b74c66b47623f1f3cfd
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: gdsc: Make enable/disable function clock controls symmetric

Currently, resets are asserted and de-asserted in the same order,
which works fine for cores with only one resettable clock domain,
but causes issues on 8x10 (VFE) where multiple clock domains are
resettable and order matters.

For cleanliness, also make the order of setting/clearing the memory
retention signals symmetric, although order there doesn't matter
at all.

Change-Id: I0d5edcd0d9fe121ed63e032915830a9c82ae5da2
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
ARM: dts: Enable additional GDSC collapse modes based on HW version

8974v2.2 supports additional collapse modes for Oxili, Venus,
and MDSS. Move the device-tree parameters that disable the modes
to version-specific files. Some MDSS collapse modes should still
remain disabled, even on v2.2.  All collapse modes are supported
on 8974Pro.

Change-Id: Ic9f1c057d16042d9a9c339dc5786cf35301169f0
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: clock-mdss: correct check for MDSS GDSC status

MDSS GDSC may be always on but clock is off in reset state.
Therefore, the correct way to check GDSC status is read both
gdsc enable bit and the clock reset bit. This change is
necessary to prevent potential crashes that may occur if
MDSS registers are accessed when MDSS GDSC is not enabled.

Change-Id: I501450beed3ea798329b34b96f2966cfefc901c2
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Pawan Kumar <pavaku@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
arm/dt: msm8974: Add GDSC regulator controlling Venus core

GDSC control is now moved out of PIL to enable power collapse
of Venus core through video driver.

Change-Id: Id8cf5547871434dede63c5a304311c53a9bc78dc
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: pil-venus: Move the GDSC control out of PIL driver

The PIL driver has full control of the Venus GDSC. It turns
on the GDSC when booting up venus and leaves it on until
venus is shutdown.

In order to save more power during video playback, interframe
power collapse can be used. This requires that the GDSC can be
turned on/off during video playback.

In order to allow the Venus driver to turn on/off the GDSC, the
PIL driver should no longer hold the GDSC on throughout the time
Venus is booted up. It is safe to do so since the Venus driver
has already added GDSC control.

Note that the proxy voting of GDSC is still present solely for
the purpose of allowing standalone testing of the Venus PIL
driver.

Change-Id: I49b7331d4ec40c08b1eba0a72942564899ca4b8f
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: pil-venus: Decrease the proxy time out value

A smaller value of proxy time out (2 sec) is good enough for venus
driver to take over the control of the proxy voting resources.

Making proxy time out smaller also has the advantage that the venus
driver can do power collapse of the core sooner if needed to save
power.

Change-Id: I9bc1824de4817a565c908d5d7b8b61356d38d168
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: vidc: Enable venus power management

Besides clock gating, turn venus core power off
if the core stays idle for given amount of time.
Powering off venus core involves telling TZ to
suspend venus core, detach IOMMU, disable GDSC
regulator, unvote DDR/OCMEM buses.

Turn it on again when driver starts processing new
commands before enabling clocks.

Protect clock and power states and operations
with a common lock.

Change-Id: I49654069920ddaae0e2f8792b14cd1bfeb431c34
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>
msm: vidc: Make HW timeout and power collapse delay configurable

Provide debugfs node for HW response timeout and a sysfs device
attribute for power collapse delay.

Change-Id: I586f10f3e90df5384c8e465fbfe8e7ebec0915eb
Signed-off-by: Sachin Shah <sachins@codeaurora.org>
Signed-off-by: franciscofranco <franciscofranco.1990@gmail.com>
Signed-off-by: flar2 <asegaert@gmail.com>