Omit DW_AT_inline under -gmlt to save a little more space.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218719 91177308-0d34-0410-b5e6-96231b3b80d8
[InstCombine] Optimize icmp-select-icmp

In special cases select instructions can be eliminated by
replacing them with a cheaper bitwise operation even when the
select result is used outside its home block. The instances implemented
are patterns like
    %x=icmp.eq
    %y=select %x,%r, null
    %z=icmp.eq|neq %y, null
    br %z,true, false
==> %x=icmp.ne
    %y=icmp.eq %r,null
    %z=or %x,%y
    br %z,true,false
The optimization is integrated into the instruction
combiner and performed only when all uses of the select result can
be replaced by the select operand proper. For this dominator information
is used and dominance is now a required analysis pass in the combiner.
The optimization itself is iterative. The critical step is to replace the
select result with the non-constant select operand. So the select becomes
local and the combiner iteratively works out simpler code pattern and
eventually eliminates the select.

rdar://17853760



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218721 91177308-0d34-0410-b5e6-96231b3b80d8
llvm/test/DebugInfo/X86/gmlt.test: Get rid of %llc_dwarf. It should not be used with -mtriple.

Also, remove object-emission. test/DebugInfo/X86 doesn't require it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218722 91177308-0d34-0410-b5e6-96231b3b80d8
llvm-cov/CoverageReport.cpp: Quick fix for msvcrt, since width specifier "z" is unavailable.

Note, mingw uses its own printf instead of msvcrt.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218723 91177308-0d34-0410-b5e6-96231b3b80d8
[x86] Teach the new vector shuffle lowering about VBROADCAST and
VPBROADCAST.

This has the somewhat expected pervasive impact. I don't know why
I forgot about this. Everything seems good with lots of significant
improvements in the tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218724 91177308-0d34-0410-b5e6-96231b3b80d8
[AVX512] Remove space before \t in AsmStrings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218725 91177308-0d34-0410-b5e6-96231b3b80d8
Implement DW_TAG_subrange_type with DW_AT_count rather than DW_AT_upper_bound

This allows proper disambiguation of unbounded arrays and arrays of zero
bound ("struct foo { int x[]; };" and "struct foo { int x[0]; }"). GCC
instead produces an upper bound of -1 in the latter situation, but count
seems tidier. This way lower_bound is provided if it's not the language
default and count is provided if the count is known, otherwise it's
omitted. Simple.

If someone wants to look at rdar://problem/12566646 and see if this
change is acceptable to that bug/fix, that might be helpful (see the
empty-and-one-elem-array.ll test case which cites that radar).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218726 91177308-0d34-0410-b5e6-96231b3b80d8
Add an emplace(...) method to llvm::Optional<T>.

This can be used for in-place initialization of non-moveable types.
For compilers that don't support variadic templates, only up to four
arguments are supported. We can always add more, of course, but this
should be good enough until we move to a later MSVC that has full
support for variadic templates.

Inspired by std::experimental::optional from the "Library Fundamentals" C++ TS.
Reviewed by David Blaikie.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218732 91177308-0d34-0410-b5e6-96231b3b80d8
[x86] Hoist the zext-lowering up in the v4i32 lowering routine -- it is
the same speed as pshufd but we can fold loads into the pmovzx
instructions.

This fixes some regressions that came up in the regression test suite
for the new vector shuffle lowering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218733 91177308-0d34-0410-b5e6-96231b3b80d8
[x86] Teach the new vector shuffle lowering to be even more aggressive
in exposing the scalar value to the broadcast DAG fragment so that we
can catch even reloads and fold them into the broadcast.

This is somewhat magical I'm afraid but seems to work. It is also what
the old lowering did, and I've switched an old test to run both
lowerings demonstrating that we get the same result.

Unlike the old code, I'm not lowering f32 or f64 scalars through this
path when we only have AVX1. The target patterns include pretty heinous
code to re-cast those as shuffles when the scalar happens to not be
spilled because AVX1 provides no broadcast mechanism from registers
what-so-ever. This is terribly brittle. I'd much rather go through our
generic lowering code to get this. If needed, we can add a peephole to
get even more opportunities to broadcast-from-spill-slots that are
exposed post-RA, but my suspicion is this just doesn't matter that much.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218734 91177308-0d34-0410-b5e6-96231b3b80d8
[InstCombine] Fix for assert build failures caused by r218721

The icmp-select-icmp optimization made the implicit assumption
that the select-icmp instructions are in the same block and asserted on it.
The fix explicitly checks for that condition and conservatively suppresses
the optimization when it is violated.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218735 91177308-0d34-0410-b5e6-96231b3b80d8
InstrProf: Make coverage::Counter comparable

I'll be using this in a clang change very soon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218736 91177308-0d34-0410-b5e6-96231b3b80d8
Fix typo in comment from r218733


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218739 91177308-0d34-0410-b5e6-96231b3b80d8
[MCJIT] Turn the getSymbolAddress free function created in r218626 into a static
member of RTDyldMemoryManager (and rename to getSymbolAddressInProcess).

The functionality this provides is very specific to RTDyldMemoryManager, so it
makes sense to keep it in that class to avoid accidental re-use.

No functional change.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218741 91177308-0d34-0410-b5e6-96231b3b80d8
test: XFAIL the non-darwin gmlt test on darwin

r218702 disabled a -gmlt optimization for darwin, but this means the
non-darwin test isn't working there anymore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218742 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] For indirect calls we don't need $gp to point to .got.  Mips linker
doesn't generate lazy binding stub for a function whose address is taken in
the program.

Differential Revision: http://reviews.llvm.org/D5067


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218744 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Fix disassembly of [ls][wd]c[23], cache, and pref                          
                                                                                  
Fixes PR21015, and PR20993.                                                       
                                                                                  
Patch by Jun Koi



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218745 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP (LLVM)

The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modelled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218747 91177308-0d34-0410-b5e6-96231b3b80d8
ADTTests/OptionalTest.cpp: Use LLVM_DELETED_FUNCTION.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218750 91177308-0d34-0410-b5e6-96231b3b80d8
Add missing natual vector cast.

Summary: The natual vector cast node (similar to bitcast) AArch64ISD::NVCAST
was introduced in r217159 and r217138. This patch adds a missing cast from
v2f32 to v1i64 which is causing some compilation failures. Also added test
cases to cover various modimm types and BUILD_VECTORs with i64 elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218751 91177308-0d34-0410-b5e6-96231b3b80d8