Updated ncr.c to point to 0x115 node for PCIe/SRIO SerDes PHY instead of previous 0x107 node
If U-boot env pei0_speed/pei1_speed/pei2_speed is not set, then default PEI speed will be set to Gen2
Added a check such that PCIe is not enumerated if PCIe PHY is not configured using U-boot parameter

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
PCIe enumeration related change

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Initializing CONFIG_SYS_MAX_I2C_BUS number of I2C interfaces for 3500. This is to address BZ 47932

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Addressed BZ 48166 and syscache enable/disable uses U-boot
parameter setting correctly for 3500

Signed-off-by: SangeethaRao <sangeetha.rao@lsi.com>
Axxia AXM3500 - add support for external Classifier Memory DDR init
Axxia AXM3500 - add support for external Classifier Memory DDR init