drivers/spi: Sanitize headers from preprocessor abuse

Continuing on from the rational given in:

a173a62 Remove guarding #includes by CONFIG_FOO combinations

Change-Id: I35c636ee7c0b106323b3e4b90629f7262750f8bd
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6114
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
AMD get_bus_conf(): Drop bus_type array

Only ever used as lvalue, so no point creating the array.

Change-Id: I6699dfae9377a895e9bc4a52579d00ddcfa60a9f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6277
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
vendorcode/amd/agesa: Use macros already defined in stdlib.h

We already have these macros define in 'stdlib.h'. Make good use of them
here to avoid redefinition conflicts of the pre-processor depending on
header inclusion ordering. This has the nice side-effect of syncing up
AGESA families in this particular regard.

Change-Id: Icf911629a4a1a82b01062fe16af4c8f812b05717
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6199
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platforms

Found using coccinelle.

Change-Id: I406de6cfe25d3b471dbb6f98d9c62addae008de3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6195
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
src/superio/ite/it8772f: Separate mainboard from SIO at obj level

Remove #include early_serial.c and rename to early_init.c as no actual
UART configuration is done here. Note that this SIO component still
hard codes its base address to 0x2e.

Change-Id: Ieef32ac7285246717f0519ffed4314ba28cd47dc
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6271
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
google/panther: general cleanup, file organization (non-functional)

acpi_tables.c: consolidate/organize headers
chromeos.c: consolidate/organize headers; move header, #defines outside
of #ifdef
fadt.c: organize headers
gpio.h: rename include guard; add comment to trailing #endif
had_verb.h: add include guard; replace manual array size calculation with std
header macro
lan.c: remove conditional header inclusion; organize headers; remove
pre-processor directive indentations
mainboard.c: remove conditional header inclusion; organize headers; replace
spaced indentations with tab(s); add comment to trailing #endif
onboard.h: move fn prototype after #defines; add comment to trailing #endif
romstage.c: consolidate/organize headers
smihandler.c: organize headers; remove commented-out/dead code; add comment
to trailing #endif
thermal.h: add comment to trailing #endif

Change-Id: Iadafdd1092108c3f52435831fa0103f2457066f1
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: http://review.coreboot.org/6270
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
superio/smsc: Add some missing header guards

Change-Id: Id3f85929024208b150c378d7636607a0c9b8617c
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6302
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
src/superio/smsc/lpc47m15x: Avoid #include early_serial.c

Provide proper header and function type-signatures for Super I/O
romstage component.

Fix mainboard's bogous romstage component to match.

Change-Id: Icd02199690d0c428b2daadf702d50714dc367692
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5924
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
mainboard: Trivial - drop trailing blank lines at EOF

Change-Id: If29a70be4fb56ebb0dbf6d510412cbe2f34480ef
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6291
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
superio/f71869ad: fix documentation of io_info mask values

Change-Id: I5d0a945de45f8f4a77193135e63f480af14a0136
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/6279
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
device/pci_early.c: Mixes up variants of a typedefs to 'u32'

Unfortunately coreboot has to deal with ROMCC's short comings which has
lead to a little bit of confusion due to typedefs. Essentially, coreboot
defines four typedefs:

 * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode
 * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined
 * 'typedef u32 pnp_devfn_t'
 * 'typedef u32 pci_devfn_t'

Some early functions make use of 'device_t' over 'pci_devfn_t' and since
the C type-checker does not enforce typedefs to the same type 'u32'
these are never noticed. Fix these so that 'device_t' does not conflict
in romstage for later work. We later plan to have 'pnp_devfn_t' and
'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a
struct pointer type exclusively.

Change-Id: I948801f5be968a934798f1bad7722649758cd4d3
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/6225
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
lenovo/x60: Support digitizer on X60t and X201t.

Change-Id: I5b0399a8edca3b73aa7d515d2c446c31b3239fa5
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5239
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
intel/model_2065x: Remove dead code.

nehalem uses gm45-like approach to resume backup so this code is never
used.

Change-Id: Ic32aa73f8d5b164b1c57815f6f44b2732fdbdcdb
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5975
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
nehalem: Move cbmem_recovery call to raminit.

Currently cbmem_recovery is done in raminit only on non-S3-resume path
do it on both paths to reduce confusion.

Change-Id: I16161ad449b9802a855fcf834aa721f4f65c0bb4
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5954
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins)
src/device/Kconfig: fix typo in label "1024x768 256-color"

It had an extraneous digit after 768.

Change-Id: Ie415e365f3eac0ed326786cea4c4628c002c4762
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Reviewed-on: http://review.coreboot.org/6306
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
build system: avoid warning about missing .xcompile

That file will be generated, but not before make managed
to complain about it.
So let's just generate it if missing - it won't hurt the
dependency tracking some lines later which is looking at
time stamps.

Change-Id: I615f38457eb27a8ffb4352b5234e262ee95d84ac
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/6305
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
board_status.sh allow cmd() to not save output

- allow for cmd() to be run, but not pipe to a file.

Change-Id: I3e1650e421a49a06218e082ceb5a60b7b4808ce8
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6258
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
board_status.sh: name temp dir and print the name

- give a template to the temp dir so they're recognizable.
- show the location of the temp files again at the end of the script.

Change-Id: Ieb031ee249043697f6a75e42284c23d0b9bad1b3
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6259
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
board_status.sh: Read coreboot boot log from a serial device

- Read the boot log from a serial device.

Change-Id: I9daf97fd9b7fc55d0d56d815b185f9b4e3ef9f5a
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6260
Reviewed-by: Mike Loptien <mike.loptien@se-eng.com>
Tested-by: build bot (Jenkins)
board_status.sh minor fixes - no functional changes

- Update some comments
- Whitespace fixes
- change from backticks to $() format for getting command data.

Change-Id: Iaf424224abfd30a3581d0e43a1689cc7c887beec
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6261
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>