arch/arm/boot/dts/zynq-adv7511-xcomm: Updated to be compatible with Vivado projects.
cf_axi_jesd204b_v51: Add Platform Device Driver Xilinx LogiCORE IP JESD204 v5.1

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
cf_axi_jesd204b_gt: Add plaform driver for ADI AXI-JESD204B GT Interface Module

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Merge branch 'xcomm_zynq_new_pcore_regmap' of https://github.com/analogdevicesinc/linux into xcomm_zynq_new_pcore_regmap
drivers/iio/adc/ad9361: If digital interface tune fails - error but use dt defaults.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Use existing register defines

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: ad9361_debugfs_write() add locks

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Add cals switch control for MCS (FMCOMMS5)

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: indio_dev->name try to use of_node->name

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Update ad9361_mcs()

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Allow multiple device instances

Multiple device instances require unique clock names.
Therefore prefix clocks with the spi dev name.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
AD9361/FMCOMMS55: Add support for ADI 2x2 multichip design

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/cf_axi_adc_core: Add support for AD9680

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Revert "media: xilinx: dma: Workaround for bytesperline"

This reverts commit b4859c939e1febb638e23accc1c3a66b72e10ccc.
Zynq Base TRD LogiCVC DRM integration requires programming
bytesperline field i.e stride is not same as width.
So we need to get rid of this workaround and send mplayer
fix to its mailing list.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
media: xilinx: Added DMA error handling

Validate dma tx descriptor returned from
dmaengine_prep_slave_single() and reports
error if any.
Next dequeue operation fails with -ENODEV

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
media: xilinx: Fix error handling

Fix error handling in xvip_graph_dma_init()
Avoid multiple free of vb2 dma context

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
media: xilinx: Reordered mutexes initialization

Reordered mutexes initialization so that there is no
need of destroying mutex incase media_entity_init()
fails.

Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
i2c: cadence: Handle > 252 byte transfers

The I2C controller sends a NACK to the slave when transfer size register
reaches zero, irrespective of the hold bit. So, in order to handle transfers
greater than 252 bytes, the transfer size register has to be maintained at a
value >= 1. This patch implements the same.
The interrupt status is cleared at the beginning of the isr instead of
the end, to avoid missing any interrupts - this is in sync with the new
transfer handling.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drivers/iio/adc/ad9361: Fix phase inversion option

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
drivers/iio/adc/ad9361: Fix cal switch control

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>