Break up some obnoxiously long combinational paths

- The main change here is not to have thread selection check if the last cycle
was a cache miss when selecting a new thread.  This ended up being a very deep
path. Now, if there is a miss, it will fetch the instruction, but mark it invalid.
Since icache misses should be relatively infrequent, this shouldn't have a big
performance impact.
- Don't avoid fetching valid bits if the cache enable
bitmap is not set. The result will be ignored anyway in that case.
- Removed dependency of ifd_instruction_valid on ifd_near_miss in dcache_data
stage. cache_hit already captures this information and has a shorter combinational
path.