2014-11-12  Tobias Burnus  <burnus@net-b.de>

        * Makefile.in (CLOOGLIBS, CLOOGINC): Remove.
        * configure.ac: Ditto.
        * graphite-interchange.c: Remove HAVE_CLOOG block.
        * config.in: Regenerate.
        * configure: Regenerate.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217436 138bc75d-0d04-0410-961f-82ee72b054a4
	* gcc.target/i386/387-1.c (dg-skip-if): Use *-*-* target selector.
	* gcc.target/i386/387-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/387-5.c (dg-skip-if): Ditto.
	* gcc.target/i386/387-6.c (dg-skip-if): Ditto.
	* gcc.target/i386/cmov7.c (dg-skip-if): Ditto.
	* gcc.target/i386/funcspec-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/funcspec-3.c (dg-skip-if): Ditto.
	* gcc.target/i386/funcspec-8.c (dg-skip-if): Ditto.
	* gcc.target/i386/funcspec-9.c (dg-skip-if): Ditto.
	* gcc.target/i386/gcc-have-sync-compare-and-swap-1.c (dg-skip-if):
	Ditto.
	* gcc.target/i386/gcc-have-sync-compare-and-swap-2.c (dg-skip-if):
	Ditto.
	* gcc.target/i386/isa-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/isa-6.c (dg-skip-if): Ditto.
	* gcc.target/i386/isa-9.c (dg-skip-if): Ditto.
	* gcc.target/i386/lea.c (dg-skip-if): Ditto.
	* gcc.target/i386/memcpy-strategy-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/memcpy-strategy-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/memcpy-vector_loop-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/memcpy-vector_loop-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/memset-vector_loop-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/memset-vector_loop-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-10.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-3.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-4.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-5a.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-5b.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-6a.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-6b.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-7.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-8.c (dg-skip-if): Ditto.
	* gcc.target/i386/pad-9.c (dg-skip-if): Ditto.
	* gcc.target/i386/pentium4-not-mull.c (dg-skip-if): Ditto.
	* gcc.target/i386/pr42589.c (dg-skip-if): Ditto.
	* gcc.target/i386/sse-19.c (dg-skip-if): Ditto.
	* gcc.target/i386/sse2-init-v2di-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/ssefn-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/ssetype-1.c (dg-skip-if): Ditto.
	* gcc.target/i386/ssetype-2.c (dg-skip-if): Ditto.
	* gcc.target/i386/ssetype-5.c (dg-skip-if): Ditto.
	* gcc.target/i386/vect-double-1.c (dg-skip-if): Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217437 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-11  Tobias Burnus  <burnus@net-b.de>

        * Makefile.def: Remove CLooG.
        * Makefile.in: Regenerate.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217438 138bc75d-0d04-0410-961f-82ee72b054a4
Fix ChangeLog of previous commit, r217438:

        * Makefile.def: Make all-gcc depend on all-isl.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217439 138bc75d-0d04-0410-961f-82ee72b054a4
Add bounds checking to vqdm*_lane intrinsics via a qualifier that also flips endianness

gcc/:

	* config/aarch64/aarch64.c (aarch64_simd_lane_bounds): Display indices.

	* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers): Add
	qualifier_lane_index.
	(aarch64_types_ternop_lane_qualifiers, TYPES_TERNOP_LANE): Rename to...
	(aarch64_types_quadop_lane_qualifiers, TYPES_QUADOP_LANE): ...these.
	(aarch64_types_ternop_lane_qualifiers, TYPES_TERNOP_LANE): New.

	(aarch64_types_getlane_qualifiers): Rename to...
	(aarch64_types_binop_imm_qualifiers): ...this.
	(TYPES_SHIFTIMM): Follow renaming.
	(TYPES_GETLANE): Rename to...
	(TYPE_GETREG): ...this.

	(aarch64_types_setlane_qualifiers): Rename to...
	(aarch64_type_ternop_imm_qualifiers): ...this.
	(TYPES_SHIFTINSERT, TYPES_SHIFTACC): Follow renaming.
	(TYPES_SETLANE): Follow renaming above, and rename self to...
	(TYPE_SETREG): ...this.

	(enum builtin_simd_arg): Add SIMD_ARG_LANE_INDEX.
	(aarch64_simd_expand_args): Add range check and endianness-flip.

	(aarch64_simd_expand_builtin): Add mapping for qualifier_lane_index.

	* config/aarch64/aarch64-simd.md
	(aarch64_sq<r>dmulh_lane<mode>_internal *2): Rename to...
	(aarch64_sq<r>dmulh_lane<mode>): ...this, and remove lane bounds check.
	(aarch64_sqdmulh_lane<mode> *2, aarch64_sqrdmulh_lane<mode> *2): Delete.

	(aarch64_sq<r>dmulh_laneq<mode>_internal): Rename to...
	(aarch64_sq<r>dmulh_lane<mode>): ...this.

	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal *2): Rename to...
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>): ...this.

	(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal *2): Rename to...
	(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): ...this.

	(aarch64_sqdmull_lane<mode>_internal *2): Rename to...
	(aarch64_sqdmull_lane<mode>): ...this.

	(aarch64_sqdmull_laneq<mode>_internal *2): Rename to...
	(aarch64_sqdmull_laneq<mode>): ...this.

	(aarch64_sqdmulh_laneq<mode>, aarch64_sqrdmulh_laneq<mode>,
	(aarch64_sqdmlal_lane<mode>, aarch64_sqdmlal_laneq<mode>,
	aarch64_sqdmlsl_lane<mode>, aarch64_sqdmlsl_laneq<mode>,
	aarch64_sqdmull_lane<mode>, aarch64_sqdmull_laneq<mode>): Delete.

	(aarch64_sqdmlal2_lane<mode>, aarch64_sqdmlal2_laneq<mode>,
	aarch64_sqdmlsl2_lane<mode>, aarch64_sqdmlsl2_laneq<mode>,
	aarch64_sqdmull2_lane<mode>, aarch64_sqdmull2_laneq<mode>): Remove
	bounds check and lane flip.

	* config/aarch64/aarch64-simd-builtins.def (be_checked_get_lane,
	get_dregoi, get_dregci, getdregxi, get_qregoi,get_qregci, get_qregxi,
	set_qregoi, set_qregci, set_qregxi): Change qualifiers to GETREG.

	(sqdmlal_lane, sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq,
	sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq, sqdmlsl2_laneq): Follow
	renaming of TERNOP_LANE to QUADOP_LANE.

	(sqdmull_lane, sqdmull_laneq, sqdmull2_lane, sqdmull2_laneq,
	sqdmulh_lane, sqdmulh_laneq, sqrdmulh_lane, sqrdmulh_laneq): Set
	qualifiers to TERNOP_LANE.

gcc/testsuite/:

         * gcc.target/aarch64/simd/vqdmlal_high_lane_s16_indices_1.c: New test.
         * gcc.target/aarch64/simd/vqdmlal_high_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_high_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_high_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlal_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlalh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlals_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_high_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_high_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_high_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_high_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsl_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlslh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmlsls_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulh_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulh_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulh_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhq_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhq_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhq_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhq_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulhs_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_high_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_high_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_high_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_high_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmull_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmullh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqdmulls_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulh_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulh_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulh_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhh_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhq_lane_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhq_lane_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhq_laneq_s16_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhq_laneq_s32_indices_1.c: Likewise.
         * gcc.target/aarch64/simd/vqrdmulhs_lane_s32_indices_1.c: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217440 138bc75d-0d04-0410-961f-82ee72b054a4
Add a testcase for PR tree-optimization/63835

	PR tree-optimization/63835
	* gcc.dg/pr63835.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217441 138bc75d-0d04-0410-961f-82ee72b054a4
Implement resolutions of LWG 2399, 2400 and 2401.

	* include/bits/shared_ptr.h (shared_ptr, weak_ptr): Define
	_Convertible alias template to simplify constraints.
	(shared_ptr(unique_ptr<TD>&&)): Constrain (LWG 2399).
	* include/bits/shared_ptr_base.h: Likewise.
	(_Sp_counted_deleter::_M_get_deleter()): Use addressof (LWG 2400).
	* include/std/functional (function::operator=(nullptr_t)): Add
	noexcept (LWG 2401).
	* testsuite/20_util/shared_ptr/cons/43820_neg.cc: Adjust dg-error.
	* testsuite/20_util/shared_ptr/cons/void_neg.cc: Adjust dg-error.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217442 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-12  Kai Tietz  <ktietz@redhat.com>

        * sdbout.c (sdbout_symbol): Eliminate register only
        if decl isn't a global variable.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217443 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2014-11-12  Paolo Carlini  <paolo.carlini@oracle.com>

	DR 1510
	PR c++/60420
	* cp-tree.h (struct cp_decl_specifier_seq): Add decltype_p bool field.
	* decl.c (grokdeclarator): Use it.
	* parser.c (cp_parser_simple_type_specifier): Likewise.
	* pt.c (tsubst, case DECLTYPE_TYPE): Use tf_ignore_bad_quals.

/testsuite
2014-11-12  Paolo Carlini  <paolo.carlini@oracle.com>

	DR 1510
	PR c++/60420
	* g++.dg/cpp0x/decltype61.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217444 138bc75d-0d04-0410-961f-82ee72b054a4
Initialize PIC register for large PIC model C++ thunk

gcc/

	PR target/63815
	* config/i386/i386.c (ix86_init_large_pic_reg): New.  Extracted
	from ...
	(ix86_init_pic_reg): Here.  Use ix86_init_large_pic_reg.
	(x86_output_mi_thunk): Set PIC register to %r11.  Call
	ix86_init_large_pic_reg to initialize PIC register.

gcc/testsuite/

	PR target/63815
	* g++.dg/other/pr63815.C: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217445 138bc75d-0d04-0410-961f-82ee72b054a4
Implement MIPS o32 FPXX, FP64, FP64A ABI extensions.

2014-11-12  Matthew Fortune  <matthew.fortune@imgtec.com>

gcc/
	* common/config/mips/mips-common.c (mips_handle_option): Ensure
	that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64.
	* config.gcc (--with-fp-32): New option.
	(--with-odd-spreg-32): Likewise.
	* config.in (HAVE_AS_DOT_MODULE): New config define.
	* config/mips/mips-protos.h
	(mips_secondary_memory_needed): New prototype.
	(mips_hard_regno_caller_save_mode): Likewise.
	* config/mips/mips.c (mips_get_reg_raw_mode): New static prototype.
	(mips_get_arg_info): Assert that V2SFmode is only handled specially
	with TARGET_PAIRED_SINGLE_FLOAT.
	(mips_return_mode_in_fpr_p): Likewise.
	(mips16_call_stub_mode_suffix): Likewise.
	(mips_get_reg_raw_mode): New static function.
	(mips_return_fpr_pair): O32 return values span two registers.
	(mips16_build_call_stub): Likewise.
	(mips_function_value_regno_p): Support both FP return registers.
	(mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1.  Add
	specific cases for TARGET_FPXX to move via memory.
	(mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger
	than UNITS_PER_FPREG 'span' one register.
	(mips_dwarf_frame_reg_mode): New static function.
	(mips_file_start): Switch to using .module instead of .gnu_attribute.
	No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6.
	Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg).
	(mips_save_reg, mips_restore_reg): Always represent DFmode frame
	slots with two CFI directives even for O32 FP64.
	(mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when
	saving/restoring callee-saved registers.
	(mips_hard_regno_mode_ok_p): Implement O32 FP64A extension.
	(mips_secondary_memory_needed): New function.
	(mips_option_override): ABI check for TARGET_FLOATXX.  Disable
	odd-numbered single-precision registers	when using TARGET_FLOATXX.
	Implement -modd-spreg and defaults.
	(mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32
	callee-saved behaviour.
	(mips_hard_regno_caller_save_mode): Implement.
	(TARGET_GET_RAW_RESULT_MODE): Define target hook.
	(TARGET_GET_RAW_ARG_MODE): Define target hook.
	(TARGET_DWARF_FRAME_REG_MODE): Define target hook.
	* config/mips/mips.h (TARGET_FLOAT32): New macro.
	(TARGET_O32_FP64A_ABI): Likewise.
	(TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add
	_MIPS_SPFPSET builtin define.
	(MIPS_FPXX_OPTION_SPEC): New macro.
	(OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and
	--with-odd-spreg-32=* to -m[no-]odd-spreg.
	(ISA_HAS_ODD_SPREG): New macro.
	(ISA_HAS_MXHC1): True for anything other than -mfp32.
	(ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg.
	(MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG.
	(HARD_REGNO_CALLER_SAVE_MODE): Define.  Implement O32 FPXX extension
	(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
	(SECONDARY_MEMORY_NEEDED): Likewise.
	(FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions.
	* config/mips/mips.md (define_attr enabled): Implement O32 FPXX and
	FP64A ABI extensions.
	(move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of
	TARGET_FLOAT64.
	* config/mips/mips.opt (mfpxx): New target option.
	(modd-spreg): Likewise.
	* config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch.
	* config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove
	fp64 sysroot.
	* config/mips/t-mti-elf: Remove fp64 multilib.
	* config/mips/t-mti-linux: Likewise.
	* configure.ac: Detect .module support.
	* configure: Regenerate.
	* doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option.
	* doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new
	options.

gcc/testsuite/
	* gcc.target/mips/args-1.c: Handle __mips_fpr == 0.
	* gcc.target/mips/call-clobbered-1.c: New.
	* gcc.target/mips/call-clobbered-2.c: New.
	* gcc.target/mips/call-clobbered-3.c: New.
	* gcc.target/mips/call-clobbered-4.c: New.
	* gcc.target/mips/call-clobbered-5.c: New.
	* gcc.target/mips/call-saved-4.c: New.
	* gcc.target/mips/call-saved-5.c: New.
	* gcc.target/mips/call-saved-6.c: New.
	* gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*,
	and -m[no-]odd-spreg.  Use _MIPS_SPFPSET to determine default
	odd-spreg option.  Account for -modd-spreg in minimum arch code.
	* gcc.target/mips/movdf-1.c: New.
	* gcc.target/mips/movdf-2.c: New.
	* gcc.target/mips/movdf-3.c: New.
	* gcc.target/mips/oddspreg-1.c: New.
	* gcc.target/mips/oddspreg-2.c: New.
	* gcc.target/mips/oddspreg-3.c: New.
	* gcc.target/mips/oddspreg-4.c: New.
	* gcc.target/mips/oddspreg-5.c: New.
	* gcc.target/mips/oddspreg-6.c: New.

libgcc/
	* config/mips/mips16.S: Set .module when supported.  Update O32
	FP64 calling convention and use for FPXX when possible.  Add FPXX
	calling convention fallback case.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217446 138bc75d-0d04-0410-961f-82ee72b054a4
Use gen_rtx_REG to set pic_offset_table_rtx

	* config/i386/i386.c (x86_output_mi_thunk): Use gen_rtx_REG to
	set pic_offset_table_rtx.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217448 138bc75d-0d04-0410-961f-82ee72b054a4
	PR ipa/63838
	* ipa-pure-const.c (propagate_nothrow): Walk w->indirect_calls
	chain instead of node->indirect_calls.  Put !can_throw into
	conditions of all the loops.

	* g++.dg/ipa/pr63838.C: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217449 138bc75d-0d04-0410-961f-82ee72b054a4
std::shared_ptr atomic operations

	PR libstdc++/57250
	* config/abi/pre/gnu.ver: Export new symbols.
	* include/Makefile.am: Add new header.
	* include/Makefile.in: Regenerate.
	* include/bits/shared_ptr_atomic.h: Define atomic access functions.
	* include/std/memory: Include new header.
	* src/c++11/shared_ptr.cc (_Sp_locker): Define and use mutex pool.
	* testsuite/20_util/shared_ptr/atomic/1.cc: New.
	* testsuite/20_util/shared_ptr/atomic/2.cc: New.
	* testsuite/20_util/shared_ptr/atomic/3.cc: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217452 138bc75d-0d04-0410-961f-82ee72b054a4
compiler: Do not count package uses from ambiguous lookups.

When using dot imports, it is possible to
have an imported symbol name that matches
the name of a struct field in a composite
literal.  Do not consider the imported
package to be used in this situation.
Fixes issue 6427.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217453 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217456 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-13  Manuel López-Ibáñez  <manu@gcc.gnu.org>

	* opts-global.c (postpone_unknown_option_warning): Fix spelling.
	(print_ignored_options): Fix quoting.
	* opts.c (common_handle_option): Likewise.
	(set_debug_level): Likewise.
	* toplev.c (process_options): Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217457 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-12  Vladimir Makarov  <vmakarov@redhat.com>

	* common.opt (flra-remat): New.
	* opts.c (default_options_table): Add entry for flra_remat.
	* timevar_def (TV_LRA_REMAT): New.
	* doc/invoke.texi (-flra-remat): Add description of the new
	option.
	* doc/passes.texi (-flra-remat): Remove lra-equivs.c and
	lra-saves.c.  Add lra-remat.c.
	* Makefile.in (OBJS): Add lra-remat.o.
	* lra-remat.c: New file.
	* lra.c: Add info about the rematerialization pass in the top
	comment.
	(collect_non_operand_hard_regs, add_regs_to_insn_regno_info):
	Process unallocatable regs too.
	(lra_constraint_new_insn_uid_start): Remove.
	(lra): Add code for calling rematerialization sub-pass.
	* lra-int.h (lra_constraint_new_insn_uid_start): Remove.
	(lra_constrain_insn, lra_remat): New prototypes.
	(lra_eliminate_regs_1): Add parameter.
	* lra-lives.c (make_hard_regno_born, make_hard_regno_dead):
	Process unallocatable hard regs too.
	(process_bb_lives): Ditto.
	* lra-spills.c (remove_pseudos): Add argument to
	lra_eliminate_regs_1 call.
	* lra-eliminations.c (lra_eliminate_regs_1): Add parameter.  Use it
	for sp offset calculation.
	(lra_eliminate_regs): Add argument for lra_eliminate_regs_1 call.
	(eliminate_regs_in_insn): Add parameter.  Use it for sp offset
	calculation.
	(process_insn_for_elimination): Add argument for
	eliminate_regs_in_insn call.
	* lra-constraints.c (get_equiv_with_elimination):  Add argument
	for lra_eliminate_regs_1 call.
	(process_addr_reg): Add parameter.  Use it.
	(process_address_1): Ditto.  Add argument for process_addr_reg
	call.
	(process_address): Ditto.
	(curr_insn_transform): Add parameter.  Use it.  Add argument for
	process_address calls.
	(lra_constrain_insn): New function.
	(lra_constraints): Add argument for curr_insn_transform call.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217458 138bc75d-0d04-0410-961f-82ee72b054a4
2014-11-13  Vladimir Makarov  <vmakarov@redhat.com>

	* lra.c (lra): Switch off rematerialization pass.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217459 138bc75d-0d04-0410-961f-82ee72b054a4
	PR libstdc++/63775
	* include/bits/regex_compiler.h (_Compiler<>::_M_expression_term,
	_BracketMatcher<>::_M_make_range): Throw regex_erorr on invalid range
	like [z-a]. Change _M_expression_term interface.
	* include/bits/regex_compiler.tcc (
	_Compiler<>::_M_insert_bracket_matcher,
	_Compiler<>::_M_expression_term): Rewrite bracket expression parsing.
	* testsuite/28_regex/algorithms/regex_match/cstring_bracket_01.cc:
	Add testcases and move file out of extended.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217461 138bc75d-0d04-0410-961f-82ee72b054a4