Trying to output data from camera over USB
Created new project to test camera
Can read data from 50x100 pixels worth of data stored on FPGA
current version after sad 3x3 impl.
Can successfully get disparity values, range 0-15, for two pixels. Also, now able to transfer data to comp from board correctly while switching between the right image array (template) and disparity array.
Under the bram folder, writing from array to bram, then from bram to array works, but there are some issues currently performing the sad operations afterwards. Beginning implementation of a state machine to see if this fixes the (timing?) issue.
state machine works for simulator but not on the actual board, the data isn't being correctly written/read to/from bram and arrays.
Can read & write from DDR RAM in atlys_ddr_test that's in verilog. The next plan is to put a VHDL wrapper around it and improve reading & writing capabilities.
In atlys_ddr_test, the vhdl wrapper for the verilog ddr stuff works. It currently writes 5 to the ddr ram 6 times, reads it back, and outputs the number on the LEDS. Next is to be able to individually read each of the 6 writes of 1 through 6 and display them on the LEDS. Then do it with fpgalink stuff.
atlys_ddr_test has the calibration and read data from the verilog test file outputed to the vhdl wrapper.
ex_cksum-me_compToFPGA can get and send bytes to and from the computer.
ex_cksum-me_compToFPGA now can sum two values from the comp and output the sum over reg3.
sad values calculated correctly. Next is the min comparators.
Can now send test img data to FPGA, perform SAD calculations, and return the two disparity values. Template and search images, as well as the SAD results, are returned to verify they work. However, for some reason, the first byte sent to the FPGA each time a write command is used, is junk data. To get around this, an extra byte is added to the front of the data sent and is ignored on the FPGA side.
Can now send additional rows to the board and receive corresponding disparity values. Next scale up to the tsubaku images.
Can do 4 pixels simultaneously.
Output the 3x3 at 4 pixels simultaneously from board to computer image.
Added timestamps to see how long it takes to run.
Clean up project files to reduce file sizes.
Adding stuff from recover branch.