northbridge/amd/agesa/family15rl: Provide Richland support

Provide our current development support for Richland. We
would however like to see a unification of 'northbridge/amd/agesa'
instead of another copy-paste merged.

Change-Id: I88005939844d1132cfd3531a9d47389320026814
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7536
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
cpu/amd/agesa/family15rl: Provide Richland CPU support

Richland -
 Microarchitecture: Piledriver
 Core stepping:     RL-A1
 CPUID:             610F31

Change-Id: I790085fbf36d836c903dcce77d794abb8578712b
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7537
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
vendorcode/amd/agesa: Use F15TN AGESA for F15RL

For the moment we make use of Trinity f15tn AGESA for Richland
f15rl support until we have properly worked out the discrepancies.

Adds RL-A1 Richland stepping cpuid to F15TnLogicalIdTables lookup.

We later wish to merge f15tn and f15rl support into the AGESA in
any case.

Change-Id: Ia9070d4e392ce7eb912771d1c7b3ef1440f8e8a8
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7559
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
mainboard/lenovo/g505s: New port Richland APU A10-5750M

Richland APU A10-5750M
8GB RAM
4MB Flash

Boots to working Linux with SeaBIOS payload. S3 works with
Linux 3.16.3-2 Debian Jessie.

Change-Id: I5d05d1b31400fdb9e41c2e011c5b0bf9986fe970
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: http://review.coreboot.org/7560
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
southbridge/amd/agesa/hudson/pci.c: Use DEVICE_NOOP macro

Change-Id: I39edaaed67f45e7c56ec02c2aac2a4c5e1b63bc7
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7586
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>