(models) corrected TypeArray, dimensions must allow duplicate integers
(e.g. int[8][8] => TypeArray(int, [8, 8]) is valid)
(tests) now allows subclasses to specify where their libraries is
(vhdl) working on correct resize of expressions
(hdl) transformed VHDL literal sizer to HDL typer
Should encompass VHDL and Verilog rules.
(models) ExprCast can now has a target type name (String)
(vhdl) first shot at to_boolean/to_std_logic
(vhdl) corrected calls to to_boolean/to_std_logic