glxext: Send the Drawable's ID in the GLX_BufferSwapComplete event

While the official INTEL_swap_event specification says that the drawable
field should contain the GLXDrawable, not the Drawable, the existing
DRI2 code in dri2.c that translates from DRI2_BufferSwapComplete sends out
GLX_BufferSwapComplete with the Drawable's ID, so existing codebases
like Clutter/Cogl rely on getting the Drawable.

Match DRI2's error here and stuff the event with the X Drawable, not
the GLX drawable.

This fixes apps seeing wrong drawables through an indirect GLX context
or with DRI3, which uses the GLX_BufferSwapComplete event directly on
the wire instead of translates Present in mesa.

At the same time, also modify the structure for the event to make sure
that clients don't make the same mistake. This is not an API or ABI
break, as GLXDrawable and Drawable are both typedefs for XID.

Signed-off-by: Jasper St. Pierre <jstpierre@mecheye.net>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
dri3: fix image extension checking.

Move the image extension setup in with all the others in
bind_extensions, and improve the check to both version
and function pointer.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Signed-off-by: Dave Airlie <airlied@redhat.com>
dri3: use invalidate.

This doesn't change anything to the intel DRI3 implementation,
but enables the gallium implementation to use dri2.stamp instead
of relying on the stamp shared with the st backend.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
gallium: Add __DRIimageDriverExtension support to gallium

__DRIimageDriverExtension is used by GLX DRI3 and Wayland.

This patch is a rewrite of
http://lists.freedesktop.org/archives/mesa-dev/2014-May/060318.html
and
http://lists.freedesktop.org/archives/mesa-dev/2014-May/060317.html

Previous patches were:
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Keith Packard <keithp@keithp.com>

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
dri/image: add blitImage to the specification

It allows to blit two __DRIimages.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
gallium/dri2: implement blitImage

V3: call flush_resource before flush
V4: Add new flags

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
nvc0: fix dri3 prime buffer creation

We need to place shared buffers into GART.

Reviewed-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
nv50: fix dri3 prime buffer creation

This is the same fix than
"nvc0: fix dri3 prime buffer creation"

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
docs: Update the status of a few things in GL3.txt

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
st/omx: keep the name, (name|role)_specific strings dynamically allocated

... as it's caller (the external program omxregister-bellagio) is the one
who frees all of the allocated memory.

Reported-by: Pedretti Fabio <pedretti.fabio@gmail.com>
Tested-by: Fabio Pedretti <pedretti.fabio@gmail.com>
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
mesa: expose ARB_seamless_cubemap_per_texture when supported

All of the bits appear to already be in place to support this in the
sampler (which the original AMD version didn't allow).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
st/omx: strcpy the string into the allocated buffer

This fixes commit a001ca98e15(st/omx: keep the name,
(name|role)_specific strings dynamically allocated) in which we
dynamically allocated the buffers for name and (name|role)_specific
yet forgot to copy the encoder strings into them.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80614
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
glsl: Add parsing support for multi-stream output in geometry shaders.

This implements parsing requirements for multi-stream support in
geometry shaders as defined in ARB_gpu_shader5.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
mesa: add StreamId information to transform feedback outputs.

For now initialized to the default stream 0.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
i965: Enable transform feedback for streams > 0

Configure hardware to read vertex data for all streams and have all streams
write their varyings to the corresponsing output buffers.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
glsl: Assign GLSL StreamIds to transform feedback outputs.

Inter-shader outputs must be on stream 0, which is the default.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
glsl: Fail to link if inter-stage input/outputs are not assigned to stream 0

Outputs that are linked to inputs in the next stage must be output to stream 0,
otherwise we should fail to link.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
glsl: Add methods to retrive a varying's name and streamId.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
glsl: Two varyings can't write to the same buffer from different streams.

If this is detected, fail to link.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
glsl: Only geometry shader outputs can be associated with non-zero streams.

This should be ensured by the parser, so assert on that.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>