[ARM] Improve arch_smp_id() to handle multiple affinity levels

Currently, arch_smp_id() implementation for arm32, arm32ve, and arm64
only considers one affinity level when computing logical SMP ID from
MPIDR register.

Recently, there has been quite a few ARM CPUs with multiple affinitly
levels (e.g. ARM big.Little and X-Gene) hence it becomes important for
our arch_smp_id() implementation to consider CPU specific affinity levels.

To handle this, at boot time we do CPU specific computation of logical
SMP ID from MPIDR and save it in special register that is only accessible
to Xvisor. The arch_smp_id() only reads the special register where we have
saved logical SMP ID. The special register for arm32 is TPIDPRW, arm32ve is
HTPIDRW, and arm64 is TPIDRW_EL2.

Signed-off-by: Anup Patel <anup@brainfault.org>