msm: dma: Refactored driver to avoid queuing of cmds in workq.

Highlights of the changes are:
1. A workqueue is used to configure ADM only when
   the clocks need to be prepared & enabled.
   A function call is used to configure ADM in
   cases where the ADM driver is invoked for data
   transfer when the clock is already prepared &
   enabled.
2. Replaced threaded irqs with hard irqs.

Change-Id: Ifaa5efdde8150f932a12d4f9eeccfb36ecb8f88f
Acked-by: John Nicholas <jnichola@qti.qualcomm.com>
Signed-off-by: Venkatesh Yadav Abbarapu <quicvenkat@codeaurora.org>
ARM: msm: Clean up sensor ADSP driver; OCMEM is no longer used

OCMEM is no longer used, hence, removing OCMEM related code from the
ADSP driver.

Change-Id: I2657923d02c462380c8d57a47493d93f073a566a
Acked-by: Kevin Smith <smithk@qti.qualcomm.com>
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
msm: ocmem: Serialize allocation requests only when necessary

Certain clients of ocmem always have exclusive regions set aside in
the OCMEM memory map. Allocation requests for such clients do not
have to wait for any pending evictions in progress to be completed
nor will trigger any new evictions and can be safely scheduled right
away.

CRs-Fixed: 599002
Change-Id: I54369bca9d26378a9aa70db83d35ab94866a3ff1
Signed-off-by: Naveen Ramaraj <nramaraj@codeaurora.org>
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
msm: ocmem: Add support for driver probe deferral

If a driver which needs to be probed before the ocmem
driver returns a EPROBE_DEFER, then the successive probe
of the ocmem driver will fail. Add support for probe
deferral in the ocmem driver.

CRs-Fixed: 552918
Change-Id: I887e67488e574fea6cb08cdaa6b1a342ab286c3a
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
msm: ocmem: Do not use data mover for clearing ocmem memory

In the non secure environment the data mover is used to clear
the ocmem memory. The ocmem driver no longer uses the data
mover for this operation.

Change-Id: I2dc4f421b1a1a81d3205bd57fe66092512e287aa
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
msm: kgsl: Set BIMC vote limits by reading the bus table

Currently a fixed number of BIMC votes are required per GPU
frequency.  Read the enumerated votes directly from the bus
table and set min/max limits on the votes dynamically.

Change-Id: I7d8118f658e6a8225291b8353301413252f1f3f7
Signed-off-by: Lucille Sylvester <lsylvest@codeaurora.org>
msm: krait-regulator: handle efuse differences

Scaling factor version is valid for
- 8974 based devices when the version bits read 1
- 8974pro based devices when the version bits read 1 or 2
- 8084 based devices when the version bits read 0
- 8092 based devices when the version bits read 0

Moreover the three bit scaling factor data for
- 8974 based devices starts at bit 16
- 8974pro based devices starts at bit 16
- 8084 based devices starts at bit 14
- 8092 based devices starts at bit 14

Update the code to handle these differences.

CRs-Fixed: 614657
Change-Id: I30c65026341ece9a03f88514127b563417df46ee
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
avtimer: Update avtimer driver to parse driver tree data

LPASS exposes registers from which timestamp can be
read by clients for audio & video synchronization.
Change adds to retrieve the register address of AV
timer in LPASS passing from driver tree data.

Change-Id: Id7cf3455e22ddc27f5350a7a37c3b40d44eb0873
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>

avtimer: Update avtimer driver to support Qdsp6v2

AVtimer in Qdsp6 provides the timer ticks for synchronization
of audio and video streams for capture and playback use cases.
Qdsp6 AVtimer interface has been updated for v2 version.
Update avtimer driver to support Qdsp6v2.

Change-Id: Ia68b04421edf13a96685654761bb71b866a5327b
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>

defconfig: 8974: Enable AV timer

Change enables AV timer driver which provides audio
and video synchronization clock support

Change-Id: I318de660e6f52d0c62bafc5cb2c9907fe007c997
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>

ARM: dt: msm8974: Add AV timer specific data

LPASS exposes registers from which timestamp can be
read by clients for audio & video synchronization.
Change adds the register address of AV timer in LPASS.

Change-Id: Idee2aeb3cb73fcbca37976629c798abeae544774
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>

avtimer: fix uninitialized variable compilation warning

Fix the following compilation warning in the avtimer driver:

kernel/drivers/platform/msm/avtimer.c:
	In function 'dev_avtimer_probe':
kernel/drivers/platform/msm/avtimer.c:316:
	warning: 'result' may be used uninitialized in this function
error, forbidden warning: avtimer.c:316
make[5]: *** [drivers/platform/msm/avtimer.o] Error 1

Change-Id: Ia760ba174e36bbcd63ed1c18cfcdce4308c825e1
Signed-off-by: David Collins <collinsd@codeaurora.org>
msm: spm-v2: Store voltage levels into PMIC_DATA3

On certain targets, where the SPM controls the power supply for each
core, the SPM power down sequence takes care of restoring the Voltage
level after a power collapse to the appropriate sleep level. The active
voltage level is stored in the PMIC_DATA_3 register and SPM state
machine uses the data in this register to restore the voltage to the
current active level.

Change-Id: I4a25440e818abdefec8cdfd3491fe9a7d772aab4
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: spm-v2: Flush the PMIC_DATA registers

Different versions of SAW use different PMIC_DATA registers to
save the current voltage, which is used to restore voltage when
exiting low power modes. Flush the appropriate PMIC_DATA registers
depending on the SAW versions.

Change-Id: I7b421ed7e60ebde7c1f9ef32ce1a047ca361c32c
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
msm: spm-v2: Use proper register offsets for SAW2_v3.0

Current code get the register offsets for SAW2 based
on hardcode macros. Use SAW2 major, minor numbers to
get the proper register offsets to different versions
of SAW2 controllers(i.e: SAW2_v2.1 and SAW2_v3.0) and
this patch remove the SAW2_v1.1 controller related code.

Change-Id: Ib80e06caab7d999bfec3ba94b786de2f5ef2074c
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
msm: spm: set pc mode bit for SAW2_3.0

Set the power collapse bitin SAW2_SPM_CTL register.
This bit is used to differentiate other low power modes
from power collapse mode. This information is used for
contolling DBGWRDUP input signal. If PC_MODE is set DBGPWRDUP
signal is de-asserted as soon as SPM_WAIT_ACK becomes HIGH.
When the PC mode is not set it will help in early exit from
clock gating.

Change-Id: I74c44d3bb2b02bec449c809a5868ff944436eb09
Signed-off-by: Venkat Devarasetty <vdevaras@codeaurora.org>
msm: spm: Update msm_spm_turn_on_cpu_rail() to use new SAW2 base address

Update the msm_spm_turn_on_cpu_rail() to use SAW2 base addresses passed
from the release_secondary to turn on the cpu rail, before bringing back
the cpu online.

Change-Id: Ic57d3995c42291d9d2f28f03591823056bf0ff41
Signed-off-by: Praveen Chidambaram <pchidamb@codeaurora.org>
msm: msm_bus: Only set clock rate on unset clocks.

Checks to see if the clock is already set before
requesting a rounded(1) rate.

CRs-Fixed: 568026
Change-Id: I7adbcffd7c86c4e714573aad5bd3813480db2a48
Signed-off-by: Dan Sneddon <dsneddon@codeaurora.org>
msm: lpm_levels: fix incorrect mode select with next event time

Based on the next event timer value the best power mode will get
selected but there is a mismatch in calculation of selecting
the best mode. This change will fix that and selects the correct
mode based on the next wakeup time.

CRs-fixed: 611794
Change-Id: I31270e62b04e7a97afa1c9b0c45069ad82d1a9b0
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: lpm_levels: Fix incorrect computation of next wakeup time

The next event timer wakeup was incorrectly computed when the hard timer
event doesn't exist. Fix by ensuring the next wakeup is computed only
when a timer event is valid

Change-Id: I40c1f372f84d8f43b2101e37dcfb592193d4b2e0
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
msm: mpm-of: fix for "cxo_lpm_clk is unbalanced" slowpath warning.

The variable xo_enabled needs protection. It might get called
simultaneously from suspend and mpm worker thread context.
Added a mutex to prevent this.

WARNING: at kernel/arch/arm/mach-msm/clock.c:411 clk_disable+0xc8/0x150()
cxo_lpm_clk is unbalanced
Modules linked in: adsprpc texfat(PO) mwlan_aarp(PO)
[<c010d24c>] (unwind_backtrace+0x0/0x138) from [<c01a0408>]
(warn_slowpath_common+0x4c/0x64)
[<c01a0408>] (warn_slowpath_common+0x4c/0x64) from [<c01a04b4>]
(warn_slowpath_fmt+0x30/0x40)
[<c01a04b4>] (warn_slowpath_fmt+0x30/0x40) from [<c011a068>]
(clk_disable+0xc8/0x150)
[<c011a068>] (clk_disable+0xc8/0x150) from [<c0180568>]
(msm_mpm_sys_low_power_modes+0x28/0x84)
[<c0180568>] (msm_mpm_sys_low_power_modes+0x28/0x84) from [<c0180768>]
(msm_mpm_work_fn+0x1c/0x5c)
[<c0180768>] (msm_mpm_work_fn+0x1c/0x5c) from [<c01b9568>]
(process_one_work+0x128/0x490)
[<c01b9568>] (process_one_work+0x128/0x490) from [<c01b9c14>]
(worker_thread+0x164/0x35c)
[<c01b9c14>] (worker_thread+0x164/0x35c) from [<c01be9a8>]
(kthread+0x88/0x94)
[<c01be9a8>] (kthread+0x88/0x94) from [<c0107a04>]
(kernel_thread_exit+0x0/0x8)
---[ end trace d18a7d72e45b272f ]---
------------[ cut here ]------------
WARNING: at kernel/arch/arm/mach-msm/clock.c:436 clk_unprepare+0xac/0xd4()
cxo_lpm_clk is unbalanced (prepare)
Modules linked in: adsprpc texfat(PO) mwlan_aarp(PO)
[<c010d24c>] (unwind_backtrace+0x0/0x138) from [<c01a0408>]
(warn_slowpath_common+0x4c/0x64)
[<c01a0408>] (warn_slowpath_common+0x4c/0x64) from [<c01a04b4>]
(warn_slowpath_fmt+0x30/0x40)
[<c01a04b4>] (warn_slowpath_fmt+0x30/0x40) from [<c011aa78>]
(clk_unprepare+0xac/0xd4)
[<c011aa78>] (clk_unprepare+0xac/0xd4) from [<c0180570>]
(msm_mpm_sys_low_power_modes+0x30/0x84)
[<c0180570>] (msm_mpm_sys_low_power_modes+0x30/0x84) from [<c0180768>]
(msm_mpm_work_fn+0x1c/0x5c)
[<c0180768>] (msm_mpm_work_fn+0x1c/0x5c) from [<c01b9568>]
(process_one_work+0x128/0x490)
[<c01b9568>] (process_one_work+0x128/0x490) from [<c01b9c14>]
(worker_thread+0x164/0x35c)
[<c01b9c14>] (worker_thread+0x164/0x35c) from [<c01be9a8>]
(kthread+0x88/0x94)
[<c01be9a8>] (kthread+0x88/0x94) from [<c0107a04>]
(kernel_thread_exit+0x0/0x8)
---[ end trace d18a7d72e45b2730 ]---

CRs-fixed: 596765
Change-Id: Ibe685e8f37eb63c4e9e9d3434719985f33c63376
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
msm: msm_bus: Introduce multi level BKE limiting.

Introduce multi level BKE throttling for BIMC masters. By specifying an
array of thresholds and limiting bandwidth values, multiple levels of
master throttling can be achieved.

Change-Id: Ic3b483d3e987266e8f37e66dff8bedd49ddd1d4d
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
msm: clock: Add parent fields to gcc_ce1_clk and gcc_ce2_clk

The votable CE core clocks should be linked up to their
parents. Add the parent fields to these clocks for
MSM8974, MSM8226, and MSM8610.

CRs-Fixed: 572028
Change-Id: Ia5567b2832cdb97f08052017d314f00dbdd41133
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: lpm_levels: update suspend stats counters and time

suspend stats in the debug pm stats are not getting updated as
suspend stats in the suspend wake path is missing. This change
will add and update the suspend stats in the suspend wake path.

CRs-fixed: 536881
Change-Id: I3b47511afb75926e51e82fc83929f405404fbf07
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>