sun6i: Add clock functions needed for SPL / DRAM init

Add clock_init_safe and clockset_pll5 functions, as these are needed for
SPL support resp. DRAM init (which is needed for SPL too).

Also add some extra clock register constant defines.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: SPL hack do not set PLL1 speed for now

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Add cpucfg register definitions

Not used atm, for future use (e.g. PSCI).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Add dram controller registers header

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Add dram initialization code

Add full support for dram initialization, using a fixed clock and autodetection
of the memory organization (numbers of channels, bus-width, etc.).

This is based on dram_sun6i.c and dram.h from u-boot in the Allwinner A31 SDK,
extended with extra initialization sequences and the autodetect algorithm
from boot0.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Poke magic sram controller register to avoid cache issues

Without this the cache will only work in write-through mode, and as soon as
it is put in write-back mode things break.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Enable SPL

Enable the SPL now that we've all the necessary bits in place.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sun6i: Add Mele M9 board

Signed-off-by: Hans de Goede <hdegoede@redhat.com>