fsp_baytrail: Add Baytrail B0/B1 "Super SKU" microcode

- Add the Bay Trail B0/B1 microcode.  These versions of the SOC were
released as a "Super SKU" which had features of all the different
SKUS (M/D/T/I), and identified as a Bay Trail T as noted by the
number 2 in the third character from the left in the microcode name.

- Update the size of the microcode blob.  We should be pushing a patch
to eliminate the need for this shortly.

Change-Id: I57ba51eabe9ea0609ab809f18b95e3bc9d5cb191
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/5986
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
fsp_baytrail: Add the default FSP location

The default FSP location needs to be in the chipset, not the mainboard.
This was removed from the Bayley Bay mainboard in patch 41ea7230f7
reviewed at http://review.coreboot.org/#/c/5982/

Change-Id: Ia26ed34e1401cbd2303166628e7a4e357d79c874
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/5985
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Tested-by: build bot (Jenkins)