msm: kgsl: Remove traces of Adreno 2xx

We're using Adreno 3xx, why care about others?

Signed-off-by: Zhao Wei Liew <zhaoweiliew@gmail.com>
msm: kgsl: don't use sscanf()

Friends do not let friends use sscanf().

CRs-Fixed: 563605
Change-Id: Ic0dedbad56af5bbee4fc833701d8bc93b118efa9
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Ananta Kishore K <akollipa@codeaurora.org>
msm: kgsl: Do not wait 100ms before checking for GPU idle

When checking for GPU idle do not wait 100ms first, this
delays detection of GPU idle by 100ms.For example in
GPU fault tolerance we check for GPU idle, this
additional 100ms wait is delaying GPU FT by 100ms in
each step.

Change-Id: I028541f6e0ef765f505a2792b0b1c313665e1ba5
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
msm: kgsl: Increase the timeout value for fault detection

Increment the timeout value for detecting faults from 50ms to
200ms. The fault detection mechanism is a backup to hardware
fault detection. 50ms is small since it has been observed that
this mechanism triggers false positives with 50ms.

CRs-Fixed: 672164
Change-Id: I8f382051e06bdc47f152309a2868092e1980604e
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>

Conflicts:
	drivers/gpu/msm/adreno.c
msm: kgsl: Force the ME off before reading the microcode

On A3XX reading the microcode while the CP is running is dangerous
beyond words.  By setting the offset address for the read, we are
essentially changing the instruction pointer for the ME while it
is running causing opcode errors, gpu faults and/or system errors.

We do not want to stop the CP at the beginning of the snapshot
process beacuse doing so changes the RBBM status and the state of
the CP registers which may damage the debug effort.  But by the
time we get to the microcode read we no longer care about the state
of the registers so we can freely halt the ME just before starting
the read.

Conflicts:
	drivers/gpu/msm/adreno_a3xx_snapshot.c

Change-Id: Ic0dedbad85d7ec26915f054dd597e226e8101a29
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
msm: kgsl: fix a race condition when calling kref_put

Fix a race condition which can occur if a thread tries to acquire
a reference to a mem_entry or context while another thread has
already decremented the refcount to 0 and is in the process of
destroying said mem_entry or context.

CRs-Fixed: 635747
Change-Id: I6be64ca75f9cb12b03e870b9ca83588197c64e5e
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Do not return invalid power stats when the device is off

adreno_power_stats() was returning unitialized data when the device
state was not active. Leave early from the function if the device
is not active and return 0s instead.

Change-Id: Ic0dedbadf6201cadb4472327c4ce7f9d9d32b82d
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Prabhat Awasthi <pawasthi@codeaurora.org>

Conflicts:
	drivers/gpu/msm/adreno.c
msm: kgsl: Remove sscanf() from kgsl_pwrctrl.c

Replace sscanf() in kgsl_pwrctrl.c with a generic function to safely
convert 32 bit unsigned ints.

CRs-fixed: 563585
Change-Id: Ic0dedbad10e2264ec8fccab622d094d123b49b77
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: Add the buffer user address to the debugfs memory list

For each buffer in the debugfs memory list print the address it is
mapped to in the user process.  This is useful for matching up the
user side allocations with what the kernel thinks it has.

Change-Id: Ic0dedbadd07a8f704c0bf73b183aaeeddbbdd129
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
msm: kgsl: use %pK to restrict printing GPU / memory addresses

Use %pK in the output for the per-process memory dump to keep from
printing the GPU and user memory addresses for the GPU memory
objects own by the process.  This allows us to make the 'mem' file
world readable without exposing any really dangerous information.

Change-Id: Ic0dedbad21654110905d1b3744f562966584d8ed
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
msm: kgsl: Release process mutex appropriately to avoid deadlock

There is a deadlock situation between
msm_iommu_lock mutex and process_mutex.

In irq context iommu_fault_handler get into
a deadlock by aquiring msm_iommu_lock and waiting
for process mutex. The other thread in
destroy_process_private is waiting for
msm_iommu_lock while holding process mutex leading
to a deadlock. With this change we release the
process mutex well before we call the function
in which msm_iommu_lock is taken.

Change-Id: I674a7512dcd3e7fe202e39b57539cb6c1e29ae0e
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
msm: kgsl: Increase IDLE_TIMEOUT for 2D core to 20secs

Increasing the hang detection time for 2D core from
10 secs to 20 secs to avoid False GPU Hangs.
Some c2d test cases are taking more than 10 secs
to process which results in a False GPU Hang.

CRs-Fixed: 454439, 644283
Change-Id: Ice5e4b719adb44cd13fb8164bafedce1049416f7
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Fix GPU hang recovery logic

During new commands submission, if the write pointer
is ahead of read pointer fill ringbuffer data with
KGSL_NOP_DATA_FILLER after NOP command. This will
avoids getting incorrect context ID from the ringbuffer
extraction logic during GPU recovery.

CRs-Fixed: 620533
Change-Id: If4d25770b7288bc6fb618611c150e3876cc87c6f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Reset VSC control registers

Configure the A2xx VSC register in context switch,
which helps GPU to recover from the bad state.

CRs-Fixed: 637288
Change-Id: I2000a579614c491a015c618a52808500541329c5
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Fix for panic in z180 postmortem dumps

We were accessing z180 registers without holding
device mutex. This change ensures that we hold the
mutex before accessing z180's registers

CRs-Fixed: 644283
Change-Id: Ib6496c427fc6c9a3f97a6720adb80a390fe21b0d
Signed-off-by: Gaurav Gagrani <ggagrani@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Setup a3xx protection in its start function

Setup the protection registers for a3xx towards the end of its
start function instead of doing it in generic ringbuffer start

Conflicts:
	drivers/gpu/msm/adreno_ringbuffer.c

Change-Id: I66df496afa5d1fdf7dea790306f5358c2098674d
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Enable protected register mode for A3XX

Turn on protected register mode for the A3XX GPU family and add 0x63
(RBBM_INT_0_MASK) to the list of protected registers.

Conflicts:
	drivers/gpu/msm/adreno.h
	drivers/gpu/msm/adreno_a3xx.c
	drivers/gpu/msm/adreno_ringbuffer.c

Change-Id: Ic0dedbad10ebfa6eb6d3d815b5aa9b6b6f0e8e35
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Protect SMMU registers from being written by the GPU

Put the SMMU register range in protected mode to shield them from
IB1/IB2 writes from userspace.

CRs-Fixed: 599971
Change-Id: Ic0dedbad8c03fc1c54ff73221231e2440d3c34dd
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Print the register that causes a protected mode error

When we get a protected mode error print out the register information
that caused the exception.

Change-Id: Ic0dedbad4f586c5715669226619b51665ef9681f
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
msm: kgsl: Protect CP_STATE_DEBUG_INDEX

Put CP_STATE_DEBUG_INDEX and CP_STATE_DEBUG_DATA under protection
to keep it from being written from an IB1. Doing so however opens
up a subtle "feature" in the microcode: memory read opcodes turn off
protected mode in the microcode to do the read and then turns it
back on regardless of the initial state. This is a problem if the
memory read happens while protected mode is turned off and then we
try to access a protected register which then complains and goes boom.

To account for this irregularity explicitly turn back off protected
mode in all the places where we know this will be a problem.

Conflicts:
	drivers/gpu/msm/adreno.c
	drivers/gpu/msm/adreno_a3xx.c

Change-Id: Ic0dedbad1397ca9b80132241ac006560a615e042
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>