OMAP4: Regulator: Remove settings for SYSEN.

For now SYSEN represent as regulator and can be configured from
board files. Thus patch removes unnecessary settings
for the SYSEN pin from the file omap_tps6236x.c.

Change-Id: Ieb07960103bb83590f464dbe8767ed086a1e44c2
Signed-off-by: Oleksandr Dmytryshyn <oleksandr.dmytryshyn@ti.com>
OMAP4460: L2X0: Temporary work-around for stability.

OMAP4460 ES1.0 seems to suffer from stability with L2 cache enabled.
The root-cause analysis is ongoing but in meantime this chabe is
to enable a software WA with L2 cache enabled build. The WA consist
of locking certain cache ways based on their positions on the
physical memory layout.

Downside of this WA is that effective L2 cache size will be 512 KB
instead of 1 MB.

Of course this is temporary WA and needs to removed once the root
cause and the right fix is found.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

Conflicts:
	arch/arm/include/asm/hardware/cache-l2x0.h
	arch/arm/mach-omap2/omap4-common.c
OMAP4: Enable full L2$ for 4460 ES1.1 Silicon.

ES1.0 seems to suffer from stability with L2 cache enabled.
The WA was locking certain cache ways based on their positions
on the physical memory layout.
ES1.1 silicon overcomes this problem.

This patch also stores the Preftech control register in SAR bank1,
which can be used in restore path. This avoids cpu check in sleep code.

Change-Id: I9a837660cf8b795e167ec21bbb0320d6767bfb18
Signed-off-by: Rajeev Kulkarni <rajeevk@ti.com>

Conflicts:
	arch/arm/mach-omap2/omap4-sar-layout.h
	arch/arm/mach-omap2/sleep44xx.S
[Blaze] OMAP: DMIC: Add omap_device for DMIC

Register DMIC device through omap device model.

Change-Id: Ib8984f2d8f5746a20e146900d0ef866a6d4e0b35
Signed-off-by: David Lambert <dlambert@ti.com>
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Chris Kelly <c-kelly@ti.com>