igb: Fix Null-pointer dereference in igb_reset_q_vector

When igb_set_interrupt_capability() calls
igb_reset_interrupt_capability() (e.g., because CONFIG_PCI_MSI is unset),
num_q_vectors has been set but no vector has yet been allocated.

igb_reset_interrupt_capability() will then call igb_reset_q_vector,
which assumes that the vector is allocated. As this is not the case, we
are accessing a NULL-pointer.

This patch fixes it by checking that q_vector is indeed different from
NULL.

Fixes: 02ef6e1d0b0023 (igb: Fix queue allocation method to accommodate changing during runtime)
Cc: Carolyn Wyborny <carolyn.wyborny@intel.com>
Signed-off-by: Christoph Paasch <christoph.paasch@uclouvain.be>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
igb: Refactor of init_nvm_params

This patch refactors the init_nvm_params functions for 82575 and adds a new
function for the i210/i211 devices in order to configure separately the NVM
functionality for the i210/i211 family.

Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
igb: Refactor NVM read functions to accommodate devices with no flash

This patch refactors NVM read functions in order to accommodate i210 devices
that do not have a flash.  Previously, this was not supported on i210
devices.

Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
igb: Add device support for flashless SKU of i210 device

This patch adds the specific device id support for versions of i210 that do
not have flash installed.

Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
igb: Don't look for a PBA in the iNVM when flashless

When a part is flashless, do not look for a PBA in the iNVM.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
net: igb: add i210/i211 support for phy read/write

The i210/i211 uses the MDICNFG register for the phy address instead of the
MDIC register.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
net: igb: add phy read/write functions that accept phy addr

Add igb_write_reg_gs40g/igb_read_reg_gs40g that can be passed a phy address.
The existing igb_write_phy_reg_gs40g/igb_read_phy_reg_gs40g become wrappers
to this function.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
igb: Support for SFP modules discovery

This patch adds support for SFP modules media type discovery for
SGMII, which will enable driver to detect supported external PHYs,
including 100baseFXSFP module.

Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
net: igb: register mii_bus for SerDes w/ external phy

If an i210 is configured for 1000BASE-BX link_mode and has an external phy
specified, then register an mii bus using the external phy address as
a mask.

An i210 hooked to an external standard phy will be configured with a link_mo
of SGMII in which case phy ops will be configured and used internall in the
igb driver for link status. However, in certain cases one might be using a
backplane SerDes connection to something that talks on the mdio bus but is
not a standard phy, such as a switch. In this case by registering an mdio
bus a phy driver can manage the device.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
phy: add driver for GW16083 Ethernet Expansion Mezzanine

This driver supports a Gateworks Ventana GW16083 Ethernet Expansion Mezzanine,
an optional expansion board for the Gateworks Ventana baseboards which adds a
7-port GigE switch (MV88E6176) connected to to the host CPU via an Intel i210
GigE MAC on the PCIe bus and providing 4 dedicated RJ45 GigE ports and 2
configurable RJ45/SFP ports via MV88E1111 PHYs.

Port5 and Port6 (labeled Ethernet5/Ethernet6 on the board silkscreen) are
connected to an MV88E1111 PHY with auto-selection between copper and SerDes
modes. Standard genphy polling is used to check the phy for a auto-selection
change and configure the switch port accordingly. For SerDes mode (SFP module)
we force a 1000mbps link up and auto-negotiate duplex. For copper mode we
auto-negotiate speed/link/duplex.

GPIO signals from the SFP module connector are used for presence detect, loss
of signal, and transmit enable and allow detection of SFP module insertion and
removal. Upon insertion we will read and validate the SFP MSA.

The GW16083 has a 24LC16BT I2C EEPROM at 0x52 as well as a PCA9543 I2C Mux at
0x70 on its i2c bus, which when used on a Ventana baseboard, is the 2nd i2c bus
(i2c2). The mux is used to steer the I2C bus to one or the other SFP module
connector for accessing SFP MSA at 0x50 and 0x51.

Basic sysfs support for GW16083 provides the following:
 - symlink /sys/kernel/gw16083 to device node
 - add ethernet1-ethernet6 nodes for get/set port enable
 - add ethernet5_mode and ethernet6_mode for get/set SFP/RJ45 mode
   (SFP|RJ45|auto)
 - add ethernet5_sfp and ethernet6_sfp to get SFP details

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
ARM: imx: ventana: added GW16083 to device-tree

Add support for the GW16083 Ethernet Expansion Mezzanine that can optionally
be connected to Ventana baseboards. We detect the GW16083 via its EEPROM on
I2C bus address 0x52.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
ventana: enable i210 support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
ventana: enable GW16083 support

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
phy: gw16083: fix failure to switch ports

Make sure we mark the phy as NOLINK on SFP remove and RUNNING again on
SFP insert. Additionally make sure we always trigger a mode change to
properly switch between fiber and copper.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>