Changed the ADC functionality completely:
Used oversampling to get increased ENOB, we are now using 256 = 4^4 samples
to make a single ADC measurement, this means that we effectively get 14bit
ADC reading. for 2500 values of voltage readings (resolution wanted) we need
at least 12bit readings, since anyway the 14bit number will have noise on the
last bits we can use truncate the averaged value. This is done in the mapping
to analog value. The only change there is in the calibration variables.

In order to obtain so many samples we do not turn of the ADC on a timer
anymore. For ADC clock frequency of 125kHz derived from the 8MHz CPU
clock with prescalar of 64 we get sampling speed of 9.5 kSPS when the 256
oversampling is taken into account plus the fact that we are multiplexing
the ADC we find approximately 10 readings per second.

The timer code can now be repurposed for something else.