Delete unread globals through addrspacecast

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198346 91177308-0d34-0410-b5e6-96231b3b80d8
[TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResults

A ValueType in a pattern dag is a type cast, and GetNumNodeResults should
handle it (the type cast has only one result).

This comes up, for example, during the type checking of pattern fragments, for
example, AArch64's Neon_combine_2d fragment is:
  dag Operands = (ops node:$Rm, node:$Rn);
  dag Fragment = (v2f64 (concat_vectors (v1f64 node:$Rm), (v1f64 node:$Rn)));

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198347 91177308-0d34-0410-b5e6-96231b3b80d8
[TableGen] Correctly generate implicit anonymous prototype defs in multiclasses

Even within a multiclass, we had been generating concrete implicit anonymous
defs when parsing values (generally in value lists). This behavior was
incorrect, and led to errors when multiclass parameters were used in the
parameter list of the implicit anonymous def.

If we had some multiclass:

multiclass mc<string n> {

 ... : SomeClass<SomeOtherClass<n> >

The capture of the multiclass parameter 'n' would not work correctly, and
depending on how the implicit SomeOtherClass was used, either TableGen would
ignore something it shouldn't, or would crash.

To fix this problem, when inside a multiclass, we generate prototype anonymous
defs for implicit anonymous defs (just as we do for explicit anonymous defs).
Within the multiclass, the current record prototype is populated with a node
that is essentially: !cast<SomeOtherClass>(!strconcat(NAME, anon_value_name)).
This is then resolved to the correct concrete anonymous def, in the usual way,
when NAME is resolved during multiclass instantiation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198348 91177308-0d34-0410-b5e6-96231b3b80d8
Allow addrspacecast in global aliases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198349 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify conditional.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198350 91177308-0d34-0410-b5e6-96231b3b80d8
Fix up a couple of review comments:

Use an if statement instead of a pair of ternary operators checking
the same condition.
Use a cheap method call rather than returning the local symbol.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198351 91177308-0d34-0410-b5e6-96231b3b80d8
Fix all the verifier tests I added for address spaces.

I originally had these using opt -verify, and I never removed the
-verify when converting them to use llvm-as instead, so these were
failing because of using the -verify argument which llvm-as doesn't have
instead of what it's actually supposed to be testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198352 91177308-0d34-0410-b5e6-96231b3b80d8
indvars: cleanup the IV visitor. It does more than gather sext/zext info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198353 91177308-0d34-0410-b5e6-96231b3b80d8
Disable compare sinking in CodeGenPrepare when multiple condition registers are available

As noted in the comment above CodeGenPrepare::OptimizeInst, which aggressively
sinks compares to reduce pressure on the condition register(s), for targets
such as PowerPC with multiple condition registers, this may not be the right
thing to do. This adds an HasMultipleConditionRegisters boolean to TLI, and
CodeGenPrepare::OptimizeInst is skipped when HasMultipleConditionRegisters is
true.

This functionality will be used by the PowerPC backend in an upcoming commit.
Especially when the PowerPC backend starts tracking individual condition
register bits as separate allocatable entities (which will happen in this
upcoming commit), this sinking from CodeGenPrepare::OptimizeInst is
significantly suboptimial.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198354 91177308-0d34-0410-b5e6-96231b3b80d8
[PPC] Use the correct immediate operands on 64-bit instructions

Several of the 64-bit fixed-point instructions with immediate operands were
using the 32-bit (i32) operand nodes instead of the corresponding 64-bit (i64)
operand definitions (u16imm instead of u16imm64, for example).

This error has had no effect so far, but would have caused type-checking
violations with an upcoming change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198356 91177308-0d34-0410-b5e6-96231b3b80d8
Revert seemingly unnecessary section sym for the data section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198357 91177308-0d34-0410-b5e6-96231b3b80d8
Elaborate on comment for skeleton CU construction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198358 91177308-0d34-0410-b5e6-96231b3b80d8
[PPC] Fix the scheduling of CR logicals on the P7

CR logicals (crand, crxor, etc.) on the P7 need to be in the first slot of each
dispatch group. The old itinerary entry was just wrong (but has not mattered
because we don't generate these instructions).

This will matter when, in an upcoming commit, we start generating these
instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198359 91177308-0d34-0410-b5e6-96231b3b80d8
Remove comments on CU skeleton construction, they're probably
obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198361 91177308-0d34-0410-b5e6-96231b3b80d8
[PPC] Fix comment to match function name

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198362 91177308-0d34-0410-b5e6-96231b3b80d8
[RegAlloc] Make tryInstructionSplit less aggressive.

The greedy register allocator tries to split a live-range around each
instruction where it is used or defined to relax the constraints on the entire
live-range (this is a last chance split before falling back to spill).
The goal is to have a big live-range that is unconstrained (i.e., that can use
the largest legal register class) and several small local live-range that carry
the constraints implied by each instruction.
E.g.,
Let csti be the constraints on operation i.

V1=
op1 V1(cst1)
op2 V1(cst2)

V1 live-range is constrained on the intersection of cst1 and cst2.

tryInstructionSplit relaxes those constraints by aggressively splitting each
def/use point:
V1=
V2 = V1
V3 = V2
op1 V3(cst1)
V4 = V2
op2 V4(cst2)

Because of how the coalescer infrastructure works, each new variable (V3, V4)
that is alive at the same time as V1 (or its copy, here V2) interfere with V1.
Thus, we end up with an uncoalescable copy for each split point.

To make tryInstructionSplit less aggressive, we check if the split point
actually relaxes the constraints on the whole live-range. If it does not, we do
not insert it.
Indeed, it will not help the global allocation problem:
- V1 will have the same constraints.
- V1 will have the same interference + possibly the newly added split variable
  VS.
- VS will produce an uncoalesceable copy if alive at the same time as V1.

<rdar://problem/15570057>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198369 91177308-0d34-0410-b5e6-96231b3b80d8