ASoC: msm: Fix RTAC to use VSID

All voice sessions use unique VSID for active
sessions in CVD. RTAC get param for voice
sessions require this VSID to work correctly with
CVD. This change fixes the issue of using proper
VSID in RTAC.

from caf
commit	73965fa98be12097e72c8fc0cd4201329ca9b520

Change-Id: I6eb8e64ee5d7fad212b77882c897e5feb3cc96c5
CRs-fixed: 506008
Signed-off-by: Venkat Sudhir <vsudhir@codeaurora.org>
Signed-off-by: Devin Kim <dojip.kim@lge.com>
arm/dt: msm8974: Tune HS PHY init sequence for USB3

Currently HS DC volatge level adjustment(TXVREFTUNE) parameter is
set to value of 0xA in PARAMETER_OVERRIDE_B PHY register for USB3.
Based on experiments performed on this target, SW has to set this
TXVREFTUNE parameter to value of 0x8. Hence tune the HS PHY init
sequence accordingly for USB3.

Change-Id: I49b56a23c602b5f582c830a6c6ad7e75461191fc
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
arm/dt: msm8974: Enable MDSS memory and logic rail retention

Avoid collapsing the MDSS power rails. These will be collapsed
and restored by the RPM.

CRs-Fixed: 500585
Change-Id: I9d44205623f0e3ce430d3365a05ede0e02586c53
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
arm/dt: msm8974: Enable Venus memory and logic rail retention

Avoid collapsing the Venus power rails. These will be collapsed
and restored by the RPM.

CRs-Fixed: 500624
Change-Id: Ia7cf58c31b83329fae00c39460044c3dfba16d89
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
dts: updates from franco

*dts: remove hysteria from the sensor, this way no crazy jumps in exported temperature are no more, it made no sense that the temperature reported could change as much as 30C in 4 seconds.
Signed-off-by: Francisco Franco <franciscofranco.1990@gmail.com>

*dts: change back to sensor 0, sensor 5 specifically tracks cpu0.
Signed-off-by: Francisco Franco <franciscofranco.1990@gmail.com>

Signed-off-by: houst0nn <houstonn@gmail.com>