nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs
nv50/ir: delay calculation of indirect addresses

Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used.  This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
          same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: add support for geometry shaders

Layer output probably doesn't work yet, but other than that everything seems
to be working.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: allow vert_count to be >255
nv50/ir: disallow predicates on emit/restart ops
nv50/ir: disallow shader input propagation for gp

For some reason, shader input accesses don't work correctly in non-ld
instructions. Disallow those loads from being propagated.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: comment out code to allow input/immed loads

This code was missing a break which made it ineffective. But since
shader input loads have been disallowed, define the code out.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50/ir: add support for gl_PrimitiveIDIn

Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.

Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: properly set the PRIMITIVE_ID enable flag when it is a gp input.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: VP_RESULT_MAP_SIZE has to be positive

Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: GP_REG_ALLOC_RESULT must be positive

Set max_out to 1 when there are no outputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: allocate an extra code bo to avoid dmesg spam

Each code BO is a heap that allocates at the end first, and so GPs are
allocated at the very end of the allocated space. When executing, we see
PAGE_NOT_PRESENT errors for the next page. Just over-allocate to make
sure that there's something there.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: don't forget to also clear additional layers

Fixes most of the tests/spec/gl-3.2/layered-rendering/* piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nvc0: don't forget to also clear additional layers

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: add comments about CB_AUX contents

Updates a few inconsistencies as well, like the size of the buffer,
location of the runout, etc.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: copy nvc0's get_sample_position implementation

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: add support for textureFetch'ing MS textures, ARB_texture_multisample

Creates two areas in the AUX constbuf:
 - Sample offsets for MS textures
 - Per-texture MS settings

When executing a textureFetch with a MS sampler, looks up that texture's
settings and adjusts the parameters given to the texfetch instruction.

With this change, all the ARB_texture_multisample piglits pass, so turn
on PIPE_CAP_TEXTURE_MULTISAMPLE.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: report glsl 1.50 now that gp tests pass

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
nv50: enable seamless cube maps on all hw

Some of the hardware support is missing. The NVIDIA-provided driver,
which claims seamless cube map support fails the relevant tests as well.
As this is the last extension before we can have OpenGL 3.2, doing this
allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
XXX nv50: attempt to handle gl_Layer writes in GP

doesn't work yet