ENGR00142950-2 - MAX17135 EPD PMIC: Ported to 2.6.38 kernel

- Ported MAX17135 MFD core driver to 2.6.38
- Ported MAX17135 HWMON temperature sensor driver to 2.6.38
- Ported MAX17135 regulator driver to 2.6.38

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142950-3 - MSL: Port EPDC/PxP driver support to 2.6.38

- Ported EPDC driver MSL layer code to 2.6.38
- Ported PxP driver MSL layer code to 2.6.38
- Ported Maxim 17135 EPD PMIC driver MSL layer code to 2.6.38

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142950-4 - Plat-MXC: Port EPDC support to 2.6.38 kernel

- Port EPDC platform code to 2.6.38
- Port PxP platform code to 2.6.38

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142950-5 - iMX5 defconfig: Port EPDC/PxP/MAX17135 to 2.6.38

- Added support for EPDC driver
- Added support for PxP driver
- Added support for MAX17135 EPD PMIC driver

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142950-6 - PxP DMA: Port PxP driver to 2.6.38 kernel

- Add drivers/dma/pxp and all PxP driver files within

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142950-7 - EPDC firmware: Port to 2.6.38

- Added firmware/imx/epdc directory
- Added EPDC waveform firmware files

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142954 - MSL clocks: correct APLL settings to prevent random PxP lockups

- Add appropriate bit settings to ANADIG_MISC to improve APLL signal integrity
and prevent intermittent PxP lockups

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142683 IPUv3:Increase IDMAC BS for RGBP and DMFC BS

This patch increases IDMAC burst size from 16 pixels to
32 pixels for RGBP pixel format and increases DMFC burst
size to 128 pixels to workaround 1080P60 display video
black flash issue.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit c9fbed971c5a1adf7c727a6b1eba67e179bd1502)
ENGR00143294-1: Fix bug in MC13892 driver

In set_voltage function, all voltages are not in microvolts.
Hence set_voltage function was failing. Change all voltages in
the function to be in microvolts.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
ENGR00143294-2: MX5x-Port DVFS-CORE and bus_freq driver to 2.6.38

Port low power mode drivers to 2.6.38

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
ENGR00143294-3: MX50-Port DVFS-CORE and bus_freq driver to 2.6.38

Port low power mode drivers to 2.6.38

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
ENGR00143309 IPUv3fb:Set default yres_virtual to be 3*yres

This patch sets framebuffer yres_virtual to be 3*yres defaultly.
Before this patch is applied, the yres_virtual will be changed
to yres when hdmi cable is hot plugged out and in, which
reduces yres_virtual to yres and pan display mechanism cannot
work well.

Signed-off-by: Liu Ying <b17645@freescale.com>
(cherry picked from commit 99a218e876a3a4831ec121fdff0e2b4e39408eda)
ENGR00143486 - MSL: MAX17135 init_data incorrectly declared __initdata

- Removed __initdata from regulator_init_data structure declaration.  This
protects the MAX17135 regulator from having its structure overwritten, which
was causing a bug when writing large chunks of memory.

Signed-off-by: Danny Nold <dannynold@freescale.com>
ENGR00142859 ipuv3: add removed g_di_clk set

add removed g_di_clk set.

Signed-off-by: Jason Chen <b02280@freescale.com>
ENGR00142865 ipuv3: add pixel clk to clk dev

add pixel clk to clk dev

Signed-off-by: Jason Chen <b02280@freescale.com>
ENGR00143511 config: add ipu and camera module in kernel build config

add ipu and camera modules in kernel build configure

Signed-off-by: Yuxi Sun <b36102@freescale.com>
ENGR00143550 camera: change camera platform data name and remove unused function

Change camera platform data name from mxc_camera_platform_data to
fsl_mxc_camera_platform_data in accordence with include/linux/fsl_devices.h
and remove unused function gpio_sensor_active(),gpio_sensor_inactive().

Signed-off-by: Yuxi Sun <b36102@freescale.com>
ENGR00143799 Add SCC RAM clock to dependency list for SAHARA clock tree

When ARM is in WAIT mode, the SCC RAM clock is disabled since
1 is written to the CCGR register by default. At that point, if SAHARA
tries to access a key or some other piece of data stored in the SCC RAM,
then it might hang.

To prevent this scenario, SCC RAM is added to dependency list
for SCC clock, and SCC clock is added to dependency list for SAHARA.

Signed-off-by: Anish Trivedi <anish@freescale.com>
ENGR00143575 IPUv3:Align IDMAC BS with DMFC FIFO BS

This patch aligns IDMAC burst size and DMFC FIFO burst
size to get better performance and workarounds black
flash issue when playing video on DP-FG with full
screen mode at 1024x768M@60.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 0e81c738566c2c97541dd92a5978c756b5c22e76)
ENGR00142551-1 IPUv3:Support triple buffer

This patch supports IPUv3 triple buffer.
Only channel 23, 27 and 28 are tested.
Test was done on MX51 BBG and MX53 SMD.
IPUv1 interface is changed accordingly
to pass building.

Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 73ef4408712acfee2d132f73555085a61be7b17c)