gcc/
	PR bootstrap/63280
	* target-globals.c (target_globals::~target_globals): Fix location
	of ira_int destruction.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215515 138bc75d-0d04-0410-961f-82ee72b054a4
	PR fortran/63331
	* trans-types.c (gfc_get_array_descr_info): Build DEBUG_EXPR_DECL
	instead of VAR_DECL for base_decl.

	* gfortran.dg/pr63331.f90: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215516 138bc75d-0d04-0410-961f-82ee72b054a4
	* tree.h (int_bit_position): Turn into inline function;
	implement using wide int.
	* tree.c (int_bit_position): Remove.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215518 138bc75d-0d04-0410-961f-82ee72b054a4
2014-09-23  Michael Meissner  <meissner@linux.vnet.ibm.com>

	* config/rs6000/rs6000.md (f32_vsx): New mode attributes to
	refine the constraints used on 32/64-bit floating point moves.
	(f32_av): Likewise.
	(f64_vsx): Likewise.
	(f64_dm): Likewise.
	(f64_av): Likewise.
	(BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa.
	(BOOL_REGS_OP1): Likewise.
	(BOOL_REGS_OP2): Likewise.
	(BOOL_REGS_UNARY): Likewise.
	(mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for
	32/64-bit floating point moves.  Do not use wa, instead use ww/ws
	for moves involving VSX registers.  Do not use constraints that
	target VSX registers for decimal types.
	(mov<mode>_hardfloat32, DFmode/DDmode): Likewise.
	(mov<mode>_hardfloat64, DFmode/DDmode): Likewise.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215521 138bc75d-0d04-0410-961f-82ee72b054a4
[libsanitizer merge from upstream r218156]

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215527 138bc75d-0d04-0410-961f-82ee72b054a4
/cp
2014-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/61857
	* parser.c (cp_parser_skip_to_closing_square_bracket,
	cp_parser_array_designator_p): New.
	(cp_parser_initializer_list): Use the latter.

/testsuite
2014-09-23  Paolo Carlini  <paolo.carlini@oracle.com>

	PR c++/61857
	* g++.dg/cpp1y/lambda-init10.C: New.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215528 138bc75d-0d04-0410-961f-82ee72b054a4
include/:
	* demangle.h (DMGL_DLANG): New macro.
	(DMGL_STYLE_MASK): Add DMGL_DLANG.
	(demangling_styles): Add dlang_demangling.
	(DLANG_DEMANGLING_STYLE_STRING): New macro.
	(DLANG_DEMANGLING): New macro.
	(dlang_demangle): New prototype.
libiberty/:
	* Makefile.in (CFILES): Add d-demangle.c.
	(REQUIRED_OFILES): Add d-demangle.o.
	* cplus-dem.c (libiberty_demanglers): Add dlang_demangling case.
	(cplus_demangle): Likewise.
	* d-demangle.c: New file.
	* testsuite/Makefile.in (really-check): Add check-d-demangle.
	* testsuite/d-demangle-expected: New file.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215530 138bc75d-0d04-0410-961f-82ee72b054a4
Relax check against commuting XOR and ASHIFTRT in combine.c

gcc/:
	* combine.c (simplify_shift_const_1): Allow commuting (ashiftrt (xor))
	when result_mode == shift_mode.

gcc/testsuite/:
	* gcc.dg/combine_ashiftrt_1.c: New test.
	* gcc.dg/combine_ashiftrt_2.c: Likewise.
	* gcc.target/aarch64/singleton_intrinsics_1.c: Remove scan-assembler
	workarounds for cmge.
	* gcc.target/aarch64/simd/int_comparisons_1.c: Likewise; also check for
	absence of mvn.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215531 138bc75d-0d04-0410-961f-82ee72b054a4
Properly regenerate gcc/configure.

	gcc/
	* configure: Regenerate.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215532 138bc75d-0d04-0410-961f-82ee72b054a4
Fix compile time warning caused by PIC_OFFSET_TABLE_REGNUM be INVALID_REGNUM

2014-09-23  Jiong Wang  <jiong.wang@arm.com>

gcc/
  * shrink-wrap.c (try_shrink_wrapping): Check PIC_OFFSET_TABLE_REGNUM not
    be INVALID_REGNUM.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215533 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215536 138bc75d-0d04-0410-961f-82ee72b054a4
Add an no_reorder attribute for LTO

Some projects need to prevent reordering of specific top level
declarations with LTO, in particular declarations defining init calls.

The only way to do that with LTO was to use -fno-toplevel-reorder,
which stops reordering for all declarations and makes LTO partitioning
less efficient.

This patch adds a new no_reorder attribute that stops reordering only
for the marked declaration. The program can then only mark e.g. the
initcalls and leave all the other declarations alone.

The patch does:

- Adds the new no_reorder attribute for the C family.
- Initializes a new no_reorder flag in the symtab_nodes in the
function visibility flag.
- Maintains the no_reorder flag when creating new nodes.
- Changes the partition code to always keep a separate
sorted queue of ordered nodes and flush them in order with the other
nodes. This is used by all nodes with -fno-toplevel-reorder,
and only the marked ones without it.
Parts of the old -fno-toplevel-reorder code paths are reused.
- Adds various checks throughout the tree to make no_reorder
marked functions behave the same as with -fno-toplevel-reorder
- Changes the LTO streamer to serialize the no_reorder attribute.

gcc/c-family/:

2014-09-23  Andi Kleen  <ak@linux.intel.com>

	* c-common.c (handle_no_reorder_attribute): New function.
	(c_common_attribute_table): Add no_reorder attribute.

gcc/:

2014-09-23  Andi Kleen  <ak@linux.intel.com>

	* cgraph.h (symtab_node): Add no_reorder attribute.
	(symbol_table::output_asm_statements): Remove.
	* cgraphclones.c (cgraph_node::create_clone): Copy no_reorder.
	(cgraph_node::create_version_clone): Dito.
	(symbol_table::output_asm_statements): Remove.
	* trans-mem.c (ipa_tm_create_version_alias): Dito.
	* cgraphunit.c (varpool_node::finalize_decl): Check no_reorder.
	(output_in_order): Add no_reorder flag. Only handle no_reorder
	nodes when set.
	(symbol_table::compile): Add separate pass for no_reorder nodes.
	(process_common_attributes): Set no_reorder flag in symtab node.
	Add node argument.
	(process_function_and_variable_attributes): Pass symtab nodes to
	process_common_attributes.
	* doc/extend.texi (no_reorder): Document no_reorder attribute.
	* lto-cgraph.c (lto_output_node): Serialize no_reorder.
	(lto_output_varpool_node): Dito.
	(input_overwrite_node): Dito.
	(input_varpool_node): Dito.
	* varpool.c (varpool_node::add): Set no_reorder attribute.
	(symbol_table::remove_unreferenced_decls): Handle no_reorder.
	(symbol_table::output_variables): Dito.
	* symtab.c (symtab_node::dump_base): Print no_reorder.

gcc/lto/:

2014-09-23  Andi Kleen  <ak@linux.intel.com>

	* lto-partition.c (node_cmp): Update comment.
	(varpool_node_cmp): Use symtab_node for comparison.
	(add_sorted_nodes): New function.
	(lto_balanced_map): Change to keep ordered queue
	of ordered node. Handle no_reorder attribute.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215537 138bc75d-0d04-0410-961f-82ee72b054a4
Add test cases for noreorder

Add some simple test cases for noreorder behaving like
-fno-toplevel-reorder and -fno-toplevel-reorder still working.

gcc/testsuite/:

2014-09-23  Andi Kleen  <ak@linux.intel.com>

	* gcc.dg/noreorder.c: New test.
	* gcc.dg/noreorder2.c: New test.
	* gcc.dg/noreorder3.c: New test.
	* gcc.dg/noreorder4.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215538 138bc75d-0d04-0410-961f-82ee72b054a4
ChangeLog:
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	PR rtl-optimization/63210
	* ira-color.c (assign_hard_reg): Ignore conflict cost if the
	HARD_REGNO is not availabe for CONFLICT_A.

testsuite/ChangeLog:
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

	* gcc.target/arm/pr63210.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215540 138bc75d-0d04-0410-961f-82ee72b054a4
AVX-512. Add widening pmov.

gcc/
	* config/i386/sse.md
	(define_insn "avx2_<code>v16qiv16hi2<mask_name>"): Add masking.
	(define_insn "avx512bw_<code>v32qiv32hi2<mask_name>"): New.
	(define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"): Add masking.
	(define_insn "avx2_<code>v8qiv8si2<mask_name>"): Ditto.
	(define_insn "sse4_1_<code>v4qiv4si2<mask_name>"): Ditto.
	(define_insn "avx2_<code>v8hiv8si2<mask_name>"): Ditto.
	(define_insn "sse4_1_<code>v4hiv4si2<mask_name>"): Ditto.
	(define_insn "avx2_<code>v4qiv4di2<mask_name>"): Ditto.
	(define_insn "sse4_1_<code>v2qiv2di2<mask_name>"): Ditto.
	(define_insn "avx2_<code>v4hiv4di2<mask_name>"): Ditto.
	(define_insn "sse4_1_<code>v2hiv2di2<mask_name>"): Ditto.
	(define_insn "avx2_<code>v4siv4di2<mask_name>"): Ditto.
	(define_insn "sse4_1_<code>v2siv2di2<mask_name>"): Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215541 138bc75d-0d04-0410-961f-82ee72b054a4
AVX-512. Add insert insn patterns.

gcc/
	* config/i386/i386.c
	(CODE_FOR_avx2_extracti128): Rename to ...
	(CODE_FOR_avx_vextractf128v4di): this.
	(CODE_FOR_avx2_inserti128): Rename to ...
	(CODE_FOR_avx_vinsertf128v4di): this.
	(ix86_expand_args_builtin): Handle CODE_FOR_avx_vinsertf128v4di,
	CODE_FOR_avx_vextractf128v4di.
	(ix86_expand_args_builtin): Handle CODE_FOR_avx512dq_vinsertf32x8_mask,
	CODE_FOR_avx512dq_vinserti32x8_mask, CODE_FOR_avx512vl_vinsertv4df,
	CODE_FOR_avx512vl_vinsertv4di, CODE_FOR_avx512vl_vinsertv8sf,
	CODE_FOR_avx512vl_vinsertv8si.
	* config/i386/sse.md
	(define_expand
	"<extract_type>_vinsert<shuffletype><extract_suf>_mask"): Use
	AVX512_VEC mode iterator.
	(define_insn
	"<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>"):
	Ditto.
	(define_expand
	"<extract_type_2>_vinsert<shuffletype><extract_suf_2>_mask"): Use
	AVX512_VEC_2 mode iterator.
	(define_insn "vec_set_lo_<mode><mask_name>"): New.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_expand "avx512vl_vinsert<mode>"): Ditto.
	(define_insn "avx2_vec_set_lo_v4di"): Delete.
	(define_insn "avx2_vec_set_hi_v4di"): Ditto.
	(define_insn "vec_set_lo_<mode><mask_name>"): Add masking.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_insn "vec_set_lo_<mode><mask_name>"): Ditto.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_expand "avx2_extracti128"): Delete.
	(define_expand "avx2_inserti128"): Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215542 138bc75d-0d04-0410-961f-82ee72b054a4
AVX-512. Add shuffles (pd, 32x4, etc.).

gcc/
	* config/i386/i386.c
	(ix86_expand_args_builtin): Handle CODE_FOR_sse2_shufpd,
	CODE_FOR_sse2_sse2_shufpd_mask, CODE_FOR_sse2_avx512dq_shuf_f64x2_mask,
	CODE_FOR_sse2_avx512dq_shuf_i64x2_mask,
	CODE_FOR_sse2_avx512vl_shuf_i32x4_mask and
	CODE_FOR_sse2_avx512vl_shuf_f32x4_mask.
	* config/i386/sse.md
	(define_expand "avx512dq_shuf_<shuffletype>64x2_mask"): New.
	(define_insn
	"<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>"): Ditto.
	(define_expand "avx512vl_shuf_<shuffletype>32x4_mask"): Ditto.
	(define_insn
	"<mask_codefor>avx512vl_shuf_<shuffletype>32x4_1<mask_name>"): Ditto.
	(define_expand "avx512vl_pshufdv3_mask"): Ditto.
	(define_insn "avx2_pshufd_1<mask_name>"): Add masking.
	(define_expand "avx512vl_pshufd_mask"): New.
	(define_insn "sse2_pshufd_1<mask_name>"): Add masking.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215543 138bc75d-0d04-0410-961f-82ee72b054a4
AVX-512. Add vpshuf[lh]w insn patterns.

gcc/
	* config/i386/sse.md
	(define_c_enum "unspec"): Add UNSPEC_PSHUFHW, UNSPEC_PSHUFLW.
	(define_insn "<mask_codefor>avx512bw_pshuflwv32hi<mask_name>"): New.
	(define_expand "avx512vl_pshuflwv3_mask"): Ditto.
	(define_insn "avx2_pshuflw_1<mask_name>"): Add masking.
	(define_expand "avx512vl_pshuflw_mask"): New.
	(define_insn "sse2_pshuflw_1<mask_name>"): Add masking.
	(define_insn "<mask_codefor>avx512bw_pshufhwv32hi<mask_name>"): New.
	(define_expand "avx512vl_pshufhwv3_mask"): Ditto.
	(define_insn "avx2_pshufhw_1<mask_name>"): Add masking.
	(define_expand "avx512vl_pshufhw_mask"): New.
	(define_insn "sse2_pshufhw_1<mask_name>"): Add masking.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215544 138bc75d-0d04-0410-961f-82ee72b054a4
AVX-512. Add cvtps2 insn patterns.

gcc/
	* config/i386/sse.md
	(define_insn
	"<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>"):
	Add masking.
	(define_insn "fix_truncv8sfv8si2<mask_name>"): Ditto.
	(define_insn "fix_truncv4sfv4si2<mask_name>"): Ditto.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215545 138bc75d-0d04-0410-961f-82ee72b054a4
2014-09-24  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    PR tree-optimization/63266
    * tree-ssa-math-opts.c (struct symbolic_number): Add comment about
    marker for unknown byte value.
    (MARKER_MASK): New macro.
    (MARKER_BYTE_UNKNOWN): New macro.
    (HEAD_MARKER): New macro.
    (do_shift_rotate): Mark bytes with unknown values due to sign
    extension when doing an arithmetic right shift. Replace hardcoded
    mask for marker by new MARKER_MASK macro.
    (find_bswap_or_nop_1): Likewise and adjust ORing of two symbolic
    numbers accordingly.

    gcc/testsuite/
    PR tree-optimization/63266
    * gcc.dg/optimize-bswapsi-1.c (swap32_d): New bswap pass test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@215546 138bc75d-0d04-0410-961f-82ee72b054a4