x86: Fix reading of vtd fault-recording register offset

The capability register is 64 bit wide.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Add BIT_MASK macro and document BYTE_MASK

BIT_MASK will help defining constants according to hardware
specifications when bits [m:n] (m > n) form a field in a register or
data structure entry. Document also the BYTE_MASK macro at this chance.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Fix VT-d fault NMI programming for x2APIC mode

Bits 7:0 of the upper address register must be zero.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Properly clear IA32_DEBUGCTL on VMCS setup and reset

We do not migrate this MSR, but we should at least clear it to avoid any
undefined behavior.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Rework evaluation of MSR_IA32_VMX_TRUE_*_CTLS

The SDM recommends to keep default1-class controls enabled if they are
unknown to the VMM. This applies to most of those bits. Even worse, by
using the TRUE_*_CTLS, we kept DEBUG_CONTROLS saving/loading disabled on
most machines, corrupting the related states on vmexit.

Switch to the "untrue" capability MSRs, except for CR3 loading/storing,
which will ensure that default1 bits are kept enabled also on future
CPUs.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Make vtd_remove_device_from_cell more robust against non-existent devices

Do not crash if we call vtd_remove_device_from_cell for a device that is
not added to a cell, and there is even no corresponding context table.
This allows to use vtd_remove_device_from_cell e.g. for rollbacks of
half-done configurations after an error occurred.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Move vtd_remove_device_from_cell

Move vtd_remove_device_from_cell unmodified. We will need it earlier.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Fold vmx/vtd_root_cell_shrink into vmx/vtd_cell_init

This primarily fixes a regression of 46ab6c2f1e: Due to that reordering,
we were first adding devices to a new cell, then removing them from the
root cell which effectively disabled them in the context table.

Analyzing the content of vmx/vtd_root_cell_shrink, we are better off
folding them into the corresponding cell_init functions. We fix the
ordering issue while doing this.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core/configs: Clean up config structure alignment/packing

Instead of spreading aligned(1), we rather need to pack all config
structures and also the containers we define in the config files
themselves. Clean this up, also dropping the now unneeded padding from
jailhouse_cell_desc.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Replace shrinking_set with root_cell.cpu_set in cell_create

Let's make it clear: the set we shrink is always the one of the root cell.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Factor out cell_destroy_internal

We will reuse it to roll back failed cell creations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Guard vtd_add_device_to_cell against addition of existing devices

Avoid that we add an already registered device to a cell, specifically
that we report this to the console. This case can happen soon when
rolling back failed cell creations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Remove some unneeded local caching of cell->config

No hot-paths, we can save the local variables.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Introduce arch_config_commit

This function allows us to consistently flush affected caches after
configuration changes. We did this after cell creation, partially did it
after destruction, but forgot about it on load/start. Flushing is now
extended to the CPU performing the changes as well as all CPUs of a
created or destroyed cell.

This change also enables the split-up of IOMMU activation and related
root cell and memory region mapping setup, a precondition for generic
memory region mapping.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Drop TLB flushes on cell configuration changes

The host TLB only requires flushing on hypervisor page table changes.
These only happen on the CPU that performs guest configurations changes
and only for mapping regions that are per-CPU. This is already handled
by flushes in page_map_create/destroy.

Hypervisor page mappings that are relevant for all CPUs are created
during setup. This is done on the setup master CPU before any other CPU
is initializing and flushing its caches by switching to the hypervisor
page table.

So we can drop x86_tlb_flush_all altogether. Rename the flush_caches
flag to flush_virt_caches to reflect that we only request guest-to-host
cache invalidations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Do not flush hypervisor TLB on unrelated page table changes

Only when working against the hypervisor page table in page_map_create
and page_map_destroy, we actually need to flush TLBs. Other page tables
require arch-specific flushings that we perform on arch_config_commit.

This measurably speeds up Jailhouse activation, e.g., when a significant
number of EPT and VT-d page table changes are performed.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Pull root cell initialization into vmx/vtd_init

Provides a micro-simplification regarding error handling and belongs
together conceptually anyway.

Some constant name shortening is required to avoid line wrappings.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core: Generic memory region mapping for cell creation with rollback on errors

Pull the memory region mappings that currently happen in vmx and vtd
into generic code paths. This allows us to properly roll back on errors
during cell creation.

We now perform the arch-specific cell initialization first, then
transfer CPUs and finally remap the memory regions. For the rollback, we
can simply use the infrastructure available for cell destruction, both
at generic level as well as inside vmx/vtd.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>