cappucino-ctrl: Add ISRs in multicore mode

We need something like shadow registers in multicore mode as we need
to do clean calculations on exceptions. Add ISRs which are used as
scratch registers on exceptions.

squashed Stefan's commit:

This should be sorted out.
I think the best way to get scratch regs would be to
make a hybrid of the fast context switching and allow
using sets of GPRs (i.e. set 1 for reg stash)
WIP: Add snoop port