spec tests for render
rearranged directory
More directory cleanup
Added first pass at Makefile
added text
Merge branch 'demo' of github.com:sanjeevs/verilog_gen into demo
fixed markdown
more formatting
Removed multi-dimensional arrays on demo interfaces
Merge branch 'demo' of github.com:sanjeevs/verilog_gen into demo
Added demo slides (first iteration)
Fixing issues with formatting
Fixing issues with formatting
Fixing issues with formatting
Fixing issues with formatting
Fixing issues with formatting
Added chip2 implementation
Formatted into potential future method
incorporated Jon feedback
Merge branch 'demo' of github.com:sanjeevs/verilog_gen into demo