Completely revamped CPU timing scheme. CPU now emulates all memory
accesses normally made by the 6502 and cycles are added on memory
access. JSR may need changes still. Also changed the cartridge
generation scheme by replacing the Mapper class with Cart and creating
a cartidge factory class (CartFactory). NROM now inherits from Cart.
This means only 1 pointer access is needed to reach NROM rather than 2.