msm: cpr: Top up the Quot for 1.2GHz, 1.0GHz MSM

Fused Quot value for 1.2GHz on a 1.2GHz part is lower than
the quot value calculated using the scaling factor formula for
1.2GHz when running on a 1.4GHz part. So, prop up the Quot for
a 1.2GHz part by a chip characterization recommended value.
Ditto for a 1.0GHz part.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit bcb46d9c47e944e828a3101c61d8caa50241640e)

Change-Id: Iba7bd1f01152444f1fef2878c7ff53b2ccc7249e
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
Signed-off-by: Sridhar Gujje <sgujje@codeaurora.org>
msm: cpr: Trim Quot top-up to improve power savings

The Quot top-up is reduced from 100 to 30 for 1.2GHz parts
based on the chip characterization test data. Similarly,
Quot top-up is reduced from 120 to 50 for 1.0GHz parts.
This reduction in the Quot value shall allow CPR to
recommend lower but safe voltages and improve power savings.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit 3a9f6c84f0d0a681dbf8c712f750f0fbbf33a5d5)

Change-Id: I21908a71f973a27775c742f48692ee11090db45f
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: cpr: change voltage step_size for 8625q

In 8625q, the external buck regulator is driving power to apps
core. And its voltage step size is 6250uV. So, change voltage
step_size to 6250uV in msm_cpr_pdata for 8625q.

Change-Id: I431f1f6c4ed9242d28642765c04c56b3b9073af4
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
msm: 8x25: Add support for MSM8625Q EVBD device.

Baseport support for MSM8625Q EVB device for QPR.

Change-Id: If116b0f974cc56b3856903c4d1c74ef8b99cc2d5
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
arm: board-msm7627a: Add TS support for 8x25Q EVBD

Add TS support for 8x25Q-EVB since it uses a different
irq_gpio.

Change-Id: Ifb4d42d0ab7c5da3f4a41996fa60375eeab2a4fa
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
msm_fb: board: Set MIPI lane swap register in the board file

Modify the MIPI Lane swap register to get display
on EVBD and SKUD devices for 8625Q chipsets.
Also disable continuous splash screen.

Change-Id: I6f0367c4d6d2f0d1121bfb2102d7c2be7a55e26c
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
msm: change RBCPR_SW_RESET_N offset for 8625Q

RBCPR_SW_RESET_N register offset has changed for 8625Q.

Change-Id: I02a3d3864f3ca532fcaaea453fb8aa80516190f5
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
(cherry picked from commit 0603b360106cfdfac84648a16f9423d3df6b94f3)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: cpr: Use cpu check for voltage step size

Earlier, platform check is used for voltage step size of cpr.
Cpu check is suffice, instead of using a long chain of platform
check.

Change-Id: I6e29bccf977baa14afa83c23b451d7d7179a2622
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: board-qrd7x27a: Disable NCP6335d REARM after TSD

By default REARM bit is set. So, ncp6335d rearms itself after thermal fault
shutdown. This is not the desired behavior. So, disable REARM bit during
initialization of buck.

Change-Id: I3cdb1f35eabe0dfae9ce142d4fc3d1154e62ca34
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
(cherry picked from commit 76451744dab6547920041f45a98d7a9fdab9a340)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: devices-msm7x27a: Add cpu check for 8x25Q

Adding CPU check for 8x25Q to increase number of GPU clock
levels.

Change-Id: I5fd42656461fd5812bc32419dbf6907425d30b4d
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
(cherry picked from commit 07090a8cc6226fc8fa4cab00b81e5da2c48616f9)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: cpr: Enable higher power saving for 8625Q.

The nominal frequency minimum voltage (Vmin) is 1V for
8x25V2.0. However, for 8x25Q, the Vmin can be reduced
to 0.95V for more power saving. The same could not be
done on 8x25 V2.0 due to some L2 cache Vmin marginality.

Change-Id: I5cec9d95d3c6adf2fcfb1abbd7ecae1314958107
Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit ceb0367f73a3cbd4dc6a6f61ee30d0ea4ed17a70)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: cpr: Update max frequency for 8x25Q for CPR.

The maximum frequency of 8625Q is 1.2GHz. This is updated
in the CPR platform data since the Quot calculations are
based on this value.

Signed-off-by: Kaushal Kumar <kaushalk@codeaurora.org>
(cherry picked from commit 5f445a481deb36ac21c28cf597bdd4c3448869bd)

Change-Id: I52477d0817683add866b1827feb4c8f3bfe45175
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
(cherry picked from commit df9088da01c6d205d6c9090d0e346539161f108a)

Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: acpuclock-8625q: Select the PVS equation dynamically.

msm8625q (Quad core chip)and 8625.v2.0 uses different
PVS equation. This patch has the required changes which
will allow acpuclock driver to use the right PVS equation.

Change-Id: I195e7105ff2073463e20dfcdbb3d654719657b94
Signed-off-by: Utsab Bose <ubose@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: 8x25: Add support for MSM8625Q SKUD device

Baseport support for MSM8625Q SKUD device for QPR.

Change-Id: I07b218b2a812cf4862c91aab658ca4e8cb6934aa
Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: camera: Use GPIO's 129 and 130 for camera LDO's

BT uses GPIO39 for MSM8625Q SKUD which is currently
being used for Camera LDO. Update the camera LDO GPIO's
to 129 and 130.

Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
(cherry picked from commit 8661b539e13dbeeac548541e0d3830164494548c)

Change-Id: I6398f9909dd7eb3ba28de2f59a381e379475d8f8
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm7627a: Add support for BT for the 8625Q EVBD/SKUD devices

Add the BT Reset Enable GPIO for EVBD device.

Signed-off-by: Aparna Mallavarapu <aparnam@codeaurora.org>
(cherry picked from commit 1f8146ba1c3628a34b3d4e10b5be87470144b2ac)

Change-Id: I8485772f01709e31fc68c50ce209615487fd6657
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: pm2: Call ACPU clock driver APIs at correct place

On 8x25Q APPS core is powered up using external BUCK
regulator. Configuring BUCK takes place using GPIOs
lines which simulates I2C. In a case where APPS
going to PC, it first informing the modem to take
control of all APPS GPIOs and then it calls ACPU
clock driver to set the frequency to TCXO. While
setting the frequency ACPU clock driver is trying
to use regulator GPIO which is currently owned by
modem and infinitely waiting for response which
causes UI freeze. Now move APPS frequency to TCXO
before handing over GPIOs to modem.

Change-Id: I017ff99999cec4156018851fe8f5b672dfa68e6e
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: 7627a-io: Add keypad support for 8x25 SKUD

Add matrix keypad support for 8x25 QRD since it has two
drive lines and one sense line.

Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
(cherry picked from commit 37a3b2e7eda3567079b9a9cf5743ec1343b0ba1b)

Change-Id: I949a156464a4ce99f8069315d85b071cd1e37175
Signed-off-by: Gopal Goberu <ggober@codeaurora.org>
msm: camera: Initialize the vfe stats structures.

The vfe stats ctrl and ops structures are being used
uninitialized. Zero them out during vfe subdevice
initialization.

Change-Id: I1c20dd54f98a778060953d25449114cdafcf52e7
Signed-off-by: Kiran Kumar H N <hurlisal@codeaurora.org>
msm: cpr: enable clock for cpr in msm_cpr_probe

Currenly, the clock for cpr is enabled in msm_cpr_init() prior to
the registration of cpr device and we aren't disabling the clock if
device registration failed. Now, we are enabling the clock in
msm_cpr_probe() i.e., after device is successfully registered.

Change-Id: Iee096aa3d3c80904e6364bb39e84fe20c2ba6115
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>