Code generation improvements.
Fixed some more cases of SSE instructions not being written properly when registerId > 7
Added missing 16-bytes alignment specifier.
Added more XMM registers to register pool on x86-64.
Link fix.
Fixed encoding for SSE shift instructions.
Handle MD shifts with registers.
Handle some specific MD packs with registers.
Replaced some standard MD operation matchers to make them aware of registers.
Added additional matcher for standard MD instructions.
Made MD unpack matchers aware of registers (but could be improved by reversing operands beforehand).
Made MD expand operations aware of registers.
Made MergeTo256 operation aware of registers.
Simplified MD_MOV to register.
Made MovMasked aware of registers.
Made MD_ADDSSW aware of registers.
Fixed encoding of some other SSE instructions.