ENGR00275377  mxc: asrc: add asrc uapi header to Kbuild

add asrc uapi header to Kbuild.

Signed-off-by: Shengjiu Wang <b02247@freescale.com>
ENGR00275384 touch: config: Add egalax touch support in Kconfig

Add  egalax touchscreen as single-touch support in Kconfig.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275385 touch: imx_v6_v7_defconfig: enable egalax single-touch support

Enable egalax touchscreen single-touch support in imx_v6_v7_defconfig.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275023-1 ARM: imx: Enable unsafe resume for MMC

As we often use SD/MMC rootfs, need to enable this configuration
for successfully resume of rootfs, otherwise, rootfs will be
broken after resume.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275023-2 ARM: imx: Correct CCM_CGPR bit17's name

Correct CCM_CGPR bit17's name according to latest RM,
it is called INT_MEM_CLK_LPM.

Add parameter for setting CCM_CGPR_INT_MEM_CLK_LPM to
support both enable and disable setting.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275023-3 ARM: imx: Correct CCM setting for DSM mode

RBC is already enabled right before suspend, so no need to
enable it in the CCM lpm setting;

Need to disable CCM int_mem_clk_lpm before entering DSM and
enable it after resume, as the whole ARM core will be powered
down in DSM.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275023-4 ARM: imx: Setting CPU isolation according to dts

Different boards may use different PMICs, and the PMICs' power
rail ramp up time can impact the DSM mode a lot, so we need to
adjust the CPU isolation timing setting according to board dts
setting, if there is no such setting defined in dts, use default
value.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275023-5 ARM: imx: Support standby mode for suspend

Support standby mode for suspend, standby mode will only
make CCM enter STOP mode with OSC on and no PMIC_STBY_REQ
asserted, standby mode focus more on resume latency than
power number.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275394 i.MX6:IEEE1588: disable phy Ar8031 SmartEEE

Connecting two boards directly more than 2 hours, Ar8031 phy link
status generates glitch, which cause ethernet link down/up issue, but
ethernet still be active. There have three cases to validate the issue:

Item#1: If add performance stress test while runing IEEE1588, the link
	down/up issue cannot be found.
Item#2: If insert switch between two net nodes and run IEEE1588 test,
	the issue also cannot be found.
Item#3: If disable AR8031 SmartEEE feature, after two days overnight test,
	no such issue found.

The issue is caused by phy Ar8031 SmartEEE feature, Item#1 and Item#2 can
prevent phy enter lpm mode, which match the Item#3 test result, so disable
SmartEEE feature to avoid the link issue generation.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275371 net: fec: PTP: Add ptp support for IXXAT stack

These patch  add ptp support for IXXAT stack.
Cherry picked from commit 1c8839574ac87826f53b96f987975a9bb1d72915.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275410 ptp: fix ptp pin collision

Ptp ts_clk pin have collision with spdif and i2c3, remove
other modules pin ctrl when enable ptp.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275414 dts: Add device tree support for ptp

Add device tree support for ptp.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275469 net:fec: move devm_* and of_* apis to probe function

fec_reset_phy() function is called in fec_enet_open(). And
fec_reset_phy() call of_get_named_gpio() and devm_gpio_request_one()
apis, which makes no sense since the two apis do something that
should only be done at .probe() time.

So move two functions into fec_probe() and only leave gpio_set_value()
and msleep() calls in fec_reset_phy(). And remove fec_free_reset_gpio()
function.

Signed-off-by: Fugang Duan  <B38611@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
ENGR00275403 ARM: imx: Support CPU hotplug

When doing secondary cores enable/disable, the enable bit
and reset bit in SRC should be written together. Without
this, CPU hotplug can NOT pass stress test, and with this,
it can passed over 500k iterations CPU hotplug test with
many threads running in background, at least three boards
are tested.

When trying hotplug a secondary core, it should stay
in idle forever before it is disabled from SRC.

Signed-off-by: Anson Huang <b20788@freescale.com>
ENGR00275481 dts: Remove PTP pin collision in dts

This reverts commit 944b782d88b1ecece76942345f5e149c63a1d6d8.
We will use dts to deal with pin collision.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275479 ptp: Remove old way of PTP pin collision

This reverts commit aa0cfc5afaf18ce8fab696483b4ca533e4741430.
We should use dts to deal with pin collision.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00275500: dts: Add ptp clock pin support for i.MX6Q/DL sabreauto

Add ptp clock dts support on i.MX6Q/DL sabreauto.

Signed-off-by: Luwei Zhou  <B45643@freescale.com>
ENGR00273792-1 Cpufreq:iMX6x:Improve CPUFREQ driver.

Add support for VDDSOC/VDDPU operating points that track
the VDDARM cap to the device tree.

Add the description for soc-operating-points that need to be added to
the device tree files.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
ENGR00273792-2 ARM:iMX6x: Improve CPUFREQ driver.

 1. Add support for VDDSOC/VDDPU operating points that track
 the VDDARM_CAP within 50mV to the device tree.
 2. Add CPU freq and VDDSOC/VDDPU operating points to MX6DL and MX6SL.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
ENGR00275004-1 input: touchscreen: max11801_ts: Add DCM mode for max11801 ADC

We need add DCM mode/AUX mode for ADC converter function of max11801, so that
it can be used to read voltage of battery. Meanwhile, let the driver based on
device tree. The patchset is based on below patch (V3.5.7):

commit 4001774cf51f0140ae7e4e8e0ec1d86475790682
Author: Rong Dian <b38775@freescale.com>
Date:   Fri Jan 18 14:24:28 2013 +0800

    Engr00240284-1 MAX11801: Add DCM aux adc sample function

        1.Add direct conversion mode operations
	2.Add aux adc sample function

Signed-off-by: Robin Gong <b38343@freescale.com>