Add settings for SGMII1 for working with external PHY
Add settings for new board
Change logo
Add reset only for SGMII0 on SFP connector in Ac-DSP
Add SPI NOR boot mode in BBLOB image. Revert back changes in device.c for anothe chip.
Add search maximum PPLM for DDR3
DDR3 leveling corrections
Change default i2c address 0x50. Add DID for some boards
Remove temorary initialization code for CCS debug
Remove commented code
Remove DDR3 PLLM and PLLD searching
Revert back board depending reset of SGMII ports
Add board depending compilation for IBL