[ARM] Handle FMA code in rtx costs.

       * config/arm/arm.c (arm_new_rtx_costs): Handle FMA.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209701 138bc75d-0d04-0410-961f-82ee72b054a4
[ARM] Cortex-A8 rtx cost table

       * config/arm/arm.c (cortexa8_extra_costs): New table.
       (arm_cortex_a8_tune): New tuning struct.
       * config/arm/arm-cores.def (cortex-a8): Use cortex_a8 tuning struct.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209702 138bc75d-0d04-0410-961f-82ee72b054a4
[ARM][1/3] Add rev field to rtx cost tables

       * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field.
       * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify
       rev cost.
       (cortex_a53_extra_costs): Likewise.
       (cortex_a57_extra_costs): Likewise.
       * config/arm/arm.c (cortexa9_extra_costs): Likewise.
       (cortexa7_extra_costs): Likewise.
       (cortexa8_extra_costs): Likewise.
       (cortexa12_extra_costs): Likewise.
       (cortexa15_extra_costs): Likewise.
       (v7m_extra_costs): Likewise.
       (arm_new_rtx_costs): Handle BSWAP.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209703 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64][2/3] Recognise rev16 operations on SImode and DImode data

       * config/aarch64/aarch64.md (rev16<mode>2): New pattern.
       (rev16<mode>2_alt): Likewise.
       * config/aarch64/aarch64.c (aarch64_rtx_costs): Handle rev16 case.
       * config/arm/aarch-common.c (aarch_rev16_shright_mask_imm_p): New.
       (aarch_rev16_shleft_mask_imm_p): Likewise.
       (aarch_rev16_p_1): Likewise.
       (aarch_rev16_p): Likewise.
       * config/arm/aarch-common-protos.h (aarch_rev16_p): Declare extern.
       (aarch_rev16_shright_mask_imm_p): Likewise.
       (aarch_rev16_shleft_mask_imm_p): Likewise.

       * gcc.target/aarch64/rev16_1.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209704 138bc75d-0d04-0410-961f-82ee72b054a4
[ARM][3/3] Recognise bitwise operations leading to SImode rev16

	* config/arm/arm.md (arm_rev16si2): New pattern.
	(arm_rev16si2_alt): Likewise.
	* config/arm/arm.c (arm_new_rtx_costs): Handle rev16 case.

	* gcc.target/arm/rev16.c: New test.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209705 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Add handling of bswap operations in rtx costs

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle BSWAP.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209706 138bc75d-0d04-0410-961f-82ee72b054a4
[Patch, microblaze]: Add optimized lshrsi3

When barrel shifter is not present, the immediate value
is greater than #5 and optimization is -OS, the
compiler will generate shift operation using loop.

Changelog

2013-11-26  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn

ChangeLog/testsuite

2014-02-12  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add INIT_PRIORITY support

Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.

These macros allows users to control the order of initialization
of objects defined at namespace scope with the init_priority
attribute by specifying a relative priority, a constant integral
expression currently bounded between 101 and 65535 inclusive.

Lower numbers indicate a higher priority.

Changelog

2013-11-26  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

 * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor,
   microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and
   TARGET_ASM_DESTRUCTOR.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add supervisory call support

A function can be executed in supervisory mode when a function
is declared with svc_handler attribute.

If a function with svc_handler is called, the processor switches
to supervisory mode and executes. After executing the function
it returns to normal mode.

Same feature can also be invoked with svc_table_handler attribute
but this attribute will accept a service ID, to be used for
calling the function.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Added Break handler support

Break handler is used to support a normal hardware break.
This is similar to interrupt_handler except that RTBD should be used instead of RTID.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by:David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Increase max alignment to please the testsuite

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Disable fivopts by default

Turn off ivopts by default. Interferes with cse.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>

 * gcc/common/config/microblaze/microblaze-common.c
   (microblaze_option_optimization_table): Disable fivopts by default.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Use bralid for profiler calls

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Enable DWARF exception handling support.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>
            David Holsgrove <david.holsgrove@xilinx.com>

 * common/config/microblaze/microblaze-common.c: Remove
   TARGET_EXCEPT_UNWIND_INFO definition.
 * config/microblaze/microblaze-protos.h: Add
   microblaze_eh_return prototype.
 * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
   microblaze_expand_epilogue, microblaze_return_addr): Handle
   calls_eh_return
   (microblaze_eh_return): New function.
 * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
   EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
   ASM_PREFERRED_EH_DATA_FORMAT
 * gcc/config/microblaze/microblaze.md: Define eh_return pattern.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Fixed missing save of r18 in fast_interrupt.

Register 18 is used as a clobber register, and must be stored when
entering a fast_interrupt. Before this fix, register 18 was only
saved if it was used directly in the interrupt function.

However, if the fast_interrupt function called a function that used
r18, the register would not be saved, and thus be mangled
upon returning from the interrupt.

Changelog

2014-02-27  Klaus Petersen <klauspetersen@gmail.com>

 * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in
   microblaze_must_save_register.

Signed-off-by: Klaus Petersen <klauspetersen@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze to check_profiling_available

Testsuite, add microblaze*-*-* target in check_profiling_available
inline with other archs setting profiling_available_saved to 0

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze pattern for dg-function-on-line

Add MicroBlaze specific pattern for checking line number and
generation of funtion in dg-function-on-line, in line with
mips method.

Changelog/testsuite

2014-02-13  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/lib/scanasm.exp (dg-function-on-line): Add
   MicroBlaze specific pattern.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Allow MicroBlaze .weakext pattern in regex match

Extend regex pattern to include optional ext at the end of
.weak to match the MicroBlaze weak label .weakext

ChangeLog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/g++.dg/abi/rtti3.C: Extend scan-assembler
   pattern to take optional ext after .weak.
 * gcc/testsuite/g++.dg/abi/thunk4.C: Likewise.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Update MicroBlaze strings test

for new scan-assembly output resulting in use of $LC label

ChangeLog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/strings1.c: Update
   to include $LC label.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, testsuite]: Add MicroBlaze to target-supports for atomic builtin tests

MicroBlaze added to supported targets for atomic builtin tests.

Changelog/testsuite

2014-02-14  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/lib/target-supports.exp: Add microblaze to
   check_effective_target_sync_int_long.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>