video: tegra: fb: Enable window state while pan

Set window enabled flag in pan display. This fixes a blank
window display while switching console from dc_ext device to
framebuffer device, and allows dc_ext and fbdev to co-exist.

Removed previous work around to unblank fb from
tegra_dc_blank function.

Bug: 970263
Bug: 963480

Change-Id: I9853da211f78815246965d240d1717345c5ab391
Signed-off-by: Shashank Sharma <shashanks@nvidia.com>
Reviewed-on: http://git-master/r/99422
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Kiran Adduri <kadduri@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>
mmc: host: Disable SDIO card clock when idle for Tegra 3 only

The CL disables SDIO card clock when idle for Tegra 3 only.

Bonus: conditional build for some tegra 3 functionalities.

Bug 975541

Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/99707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peer Chen <pchen@nvidia.com>
arm: tegra3: configs:marvel driver as a module

enable marvel driver as module to load at boot time

Bug 954218

Change-Id: I7dc6385dcbad7b7a7960b688c6d74bd6bc35cad9
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98454
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Conflicts:
	arch/arm/configs/tegra3_android_defconfig
net: wireless: sd8797: change wlan interface to wlan0

Change wlan interface from mlan to wlan.

Bug 954218

Change-Id: I5b2b2840a4830eda908a47cc0fc59d0479a1df34
Signed-off-by: Narayan Reddy <narayanr@nvidia.com>
Reviewed-on: http://git-master/r/98997
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Revert "arm: tegra3: change min_rate for clocks"

This reverts commit 5dc206986103aaa443fa6b0ef6fef20bcb35d299 because
it causes noisy audio playback on Tegra3 platforms with secure-os.

Bug 939415

Change-Id: Ib19962dd57a2560945d1c0ed49b3eade2c751446
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/98986
Reviewed-by: Automatic_Commit_Validation_User
arm: tegra: Update pinmux setting for nct alert

Set KB_ROW11 pin to default PULL_UP to fix
the excessive interrupts from nct alert.

Bug 973536

Change-Id: Idab3769f3fe1945f5e0f487f7bd23a7c0b58d5d1
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/99339
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hunk Lin <hulin@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
arm: tegra: grouper: Update pinmux setting for nct alert

Set KB_ROW11 pin to default PULL_UP to fix
the excessive interrupts from nct alert for grouper too.
ARM: tegra: clock: Add DSI implicit dependency on PLLP

Added dsi fixed clock entry derived from PLLP_OUT3. This would allow
DC driver to properly ref-count implicit dependency of DSI operations
on PLLP_OUT3 clock.

Bug 933653

Change-Id: I71e6ada13f9d231c5a4924f345cdbf7cf05cd59e
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/98103
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
video: tegra: dsi: Ref-count pllp_out3 clock in DSI.

Bug 933653

Change-Id: If7ce4dc5129782a7e3487028d2dba01c9380ba90
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/98256
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
gpio: tegra: implement gpio_request and gpio_free.

Recent pinctrl discussions concluded that gpiolib APIs
should in fact do whatever is required to mux a GPIO onto
pins.
This change is based on the work done by Stephen Warren in mainline
kernel.
-----
commit 3e215d0a19c2a0c389bd9117573b6dd8e46f96a8

    gpio: tegra: Hide tegra_gpio_enable/disable()

    Recent pinctrl discussions concluded that gpiolib APIs should in fact do
    whatever is required to mux a GPIO onto pins, by calling pinctrl APIs if
    required. This change implements this for the Tegra GPIO driver, and removes
    calls to the Tegra-specific APIs from drivers and board files.
----

Change-Id: I482ea5c177cf2ee6fa06ddac48b556f1508efacb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/98466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
arm: tegra: enterprise: Set gpio LCD_D8 to tristate

LCD_D8 used for BAT_REMOVAL staus from PMU to be
programmed as input/tristate to in line with hardware
schematics. It is connected VIO_IN

Bug 955519
(Cherry picked from I692d8d805c54da3996c33b9837b197a6995689c8)
Change-Id: I68e6566249675cd5fce8aa954983478e4fc29a4c
Reviewed-On: http://git-master/r/#change,91589
Signed-off-by: Karthik Ramakrishnan <karthikr@nvidia.com>
Reviewed-on: http://git-master/r/99742
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
ARM: tegra: power: Enforce CPU rate range in min cpu notifier

On Tegra3 make sure cpu rate is within G-mode range before LP to G
mode switch triggered by minimum CPUs notifier.

Bug 964208

Change-Id: Ic4ee6bc7eca5ad0902da4907e4702f296a155280
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/99834
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

Conflicts:
	arch/arm/mach-tegra/cpu-tegra.c
	arch/arm/mach-tegra/cpu-tegra3.c
Revert "video: tegra: dc: Set default videomode"

This reverts commit 9349cedf17f9b3c10760c8d48f831473f87a3a15.

It is reviewed on http://git-master/r/99635
It will cause HDMI power ON and emc clock bump up to 667Mhz
after resume from LP0.

bug 930136

Change-Id: I130494fdb381b3d322ac0e3fc8be2e44f2c2d7a7
Signed-off-by: Hunk Lin <hulin@nvidia.com>
Reviewed-on: http://git-master/r/100202
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jon Mayo <jmayo@nvidia.com>

Conflicts:
	drivers/video/tegra/dc/dc.c
power: smb349: addition of regulator interface

Addition of regulator interface to detect the usb cable
plug/unplug detection.

bug 974806

Reviewed-on: http://git-master/r/95063
(cherry picked from commit 0ff4f3f13f3751a7d861888094ff213b6022640e)

Change-Id: If6522a56511549bb0faa45b0654fcb390d27af21
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/99604
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>

Conflicts:
	drivers/power/smb349-charger.c
	include/linux/smb349-charger.h
arm: tegra: kai: addition of charger regulator

Use SMB349 regulator instead of irq to controll USB1 VBUS

Reviewed-on: http://git-master/r/96374
(cherry picked from commit 052e692e3226dfd558d1b86d7ba336a65fb46486)

Change-Id: I440c2d4f61e93c8b1192196e204c6c24be0de183
Signed-off-by: Chandler Zhang <chazhang@nvidia.com>
Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com>
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/99605
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
ARM: tegra: whistler: Add slave address for i2c driver

Configuring all i2c controller to have slave addresss to 0xFC
(unused slave address) to avoid responding the slave with general
call address.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91951

Change-Id: Id1a45f46cfc5ffa3a48b01c0bae71c4ee9ab699b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100259
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: ventana: Set drive strength to max for all i2c pins

Setting drive strength to maiximum for all i2c pins.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91952

Change-Id: I8882dd238af34e06c924f2e160d0897111e8103d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100260
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: whistler: Set I2c pin drive strength to max

Setting i2c drive strenth to maximum and pulling all pins
to high.
bug 951052
bug 958415
bug 927583

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91805

Change-Id: Ia2bf4ccba6d4c47411e59fb9567dc4e3c2db76ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100261
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: enterprise: register supply regulator before child regulator

LDO3 has the input from the VIO output and hence VIO should be
register before LDO3 for regulator registration.

bug 976254

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99446

Change-Id: I6771af3e7eb93886e974695ab3550cdf8ebc52c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100262
Reviewed-by: Automatic_Commit_Validation_User
mfd: tps80031: fix missed irq issue

We found missed irq could be happened if clear all INT_STS_x register in one time.
Shadow register pushes the irq status after the first byte of INT_STS_x was cleared
The proposed way to clear interrupt is to write only one INT_STS_x register.
It will also clear the other two ones.

Bug 952476

Reviewed-on: http://git-master/r/93453
Signed-off-by: Steve Kuo <stevek@nvidia.com>

(cherry picked from commit 0c92f32e9e03defaeac991518b26134e59ef4db6)

Change-Id: I76179be4847f59a1687926b9b0dde6ebd3f58aa4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100306