x86/debug: return report_summary

run_tests always reported 'PASS debug', even when subtests were
failing. Fix that.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
emulator: correct format string

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
libcflat: move stringification trick to a common place

Rename "str" to "xxstr" to avoid a conflict with lib/x86/processor.h.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: move size #defines to processor.h

These are necessary in many testcases that includes hand-written
assembly, otherwise they will only run for either 32- or 64-bit.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: desc: change set_gdt_entry argument to selector

This interface, already used in taskswitch.c, is a bit easier to use.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: desc: move idt_entry_t and gdt_entry_t to header

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: desc: reuse cstart.S GDT and TSS

There is no particular reason to use a specific TSS in tests that
use task-switching.  In fact, in many cases the tests just want
a separate interrupt stack and could run on 64-bit just as well
if the task-switching is abstracted.

As a first step, remove duplicate protected mode setup from desc.c's
users.  Just leave some spare selectors in cstart.S's GDT before
the CPUs' main TSS.  Then reuse CPU 0's TSS as TSS_MAIN.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: taskswitch: use desc library

The APIs in desc.c make it much simpler to understand what the test
is doing.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: unify GDT format between 32-bit and 64-bit

Except the TSS, which is 16-bytes in 64-bit mode, we can use the same
structure and share the constants.  This will aid in porting tests
to 64-bit.

Multiple bitwidth and ring 3 selectors aren't used yet.  I couldn't
make my mind on keeping vs. dropping them, in the end I kept the ring 3
selectors which have a chance of being used for SMAP or paging unit tests.

With this change, vmx.c can start using desc.h's constants and those
in vm.h (why vm.h?) can be dropped.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: move CR0 and CR4 constants to processor.h

Move them together with the inline function that read/write the
control registers.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: desc: support ISTs for alternate stacks in 64-bit mode

Introduce a new API that replaces setup_tss32 and set_intr_task_gate
in tests that run in both modes.  This will enable three more tests in
eventinj to run in 64-bit mode.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: eventinj: fix inline assembly and make it more robust to new compilers

Using assembler trampolines instead of && fixes NMI IRET test.

There is another bug, however.  Returns to the same privilege level do
not pop SS:RSP on 32-bit, so the nested NMI underflowed the stack at "s".
This is fixed in the new code.  The new code doesn't set up SS:RSP and
instead leaves some space for the nested NMI handler on the alternate
stack.  The old stack pointer is kept and restored when the nested
handler returns.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: eventinj: enable NP test in 64-bit mode

Sharing the GDT between 32-bit and 64-bit means that the non-present
code segment is now always there, and the test just works.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: eventinj: port consecutive exception tests to x86-64

Use ISTs instead of tasks.

One big remaining difference between 32- and 64-bits is that tasks
on 32-bits take care of saving registers.  ISTs do not, only the
stack is affected.

For now, just save/restore caller-save registers in the assembly
wrapper, since there's just one test that uses ISTs.  Later we
can extend the existing APIs to register exception handlers, so
that they can use tasks or ISTs too.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: xsave: use cpuid functions from processor.h

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: svm: rename get_pte function

We will make it public in vm.c with the next patch.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: vm: remove dead code

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: vm: mark intermediate PTEs as user-accessible

It is pointless to make the leaf user-accessible if the intermediate page
tables are not.  In a real OS, what would matter is that the page tables
themselves are only accessible through a supervisor mapping.

The SMAP testcase will rely on the user bit, so fix it now.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: test mov DR with ignored mod bits

Tests whether the emulator ignores the mod bits on mov DR instruction.  The
test performs regular mov to DR0 and reads back the data using custom mov from
DR0 while mod bits are set to zero. The expected result is obviously the value
which was written to DR0 before.

The test is performed in realmode and is only expected to fail if the CPU does
not support unrestricted mode. Note that mov-CR/DR in protected mode are
usually not handled by the emulator, as their data is available in the exit
information fields.

Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
x86: vm: export get_pte and return a pointer to it

This lets us modify the flags for the PTE corresponding to a virtual address.
The SMAP testcase will use this to build supervisor-mode pages.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>