axxia: Update Config Files and Device Trees for LSI Axxia Targets

Signed-off-by: John Jacques <john.jacques@lsi.com>
Merge branch 'standard/lsi/base' into standard/preempt-rt/lsi/base
net: lsi_acp_net: Added new string to DT match

Add a the vendor prefixed compatible string to the match table.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
ARM: dts: axxia: Corrected IRQ for memory contollers

The interrupt numbers for the memory controllers was wrong (conflicting with
assigned range for PCI MSI. This would cause a device using MSI to fail to
request its IRQ.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
ARM: axxia: Support MSI on both PCIe controllers

Add support for PCIe MSI on both controllers. On AXM5516, PCIE0 has the ability
to signal MSI interrupts on 16 separate lines to the CPU cores, where as PCIE1
only has a single interrupt line that is used for legacy, status/error and MSI.
This patch adds MSI support on a controller with only one interrupt line.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Merge branch 'standard/lsi/base' into standard/preempt-rt/lsi/base
arch/powerpc: Add CONFIG_HIGHMEM to the LSI Default Configuration

Signed-off-by: John Jacques <john.jacques@lsi.com>
i2c: axxia: Minor cleanup (cosmetic)

Remove unused definitions and remove redundant variable.

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
i2c: axxia: Report spurious IRQ

Fixed ISR to return IRQ_NONE if no interrupt was pending (or no transfer
was in progress).

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
i2c: axxia: Fix broken smbus block read

Changed the initial transfer size on block reads from 1 to
I2C_SMBUS_BLOCK_MAX. The size is adjusted when the first byte (block
length) is received. Having the initial size set to 1 could cause the
controller to stop the transfer after the block length byte, if the
transfer length register wasn't updated in time.

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
i2c: axxia: Fall back to polling mode when no IRQ

If the device tree does not specify an interrupt property, the device driver
falls back to polling the controller status. This is needed to support
simulator models without interrupt capabilities.

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
ARM: axxia: Fix .init section mismatch

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
spi: pl022: Fix .init section mismatch

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
gpio: pl061: Fix .init section mismatch

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
misc: lsi-smmon: Bug when probing with IRQ pending

We must not call the ncr_write function to unmask interrupts with
the memory controller interrupt enabled, as this could cause the ISR to
be invoked before ncr_write has released the lock used to serialize
register accesses.

To avoid this, temporarily disable the IRQ line while unmasking the
interrupt sources in the controller.

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
misc: lsi-smmon: Add parameter panic_on_fatal

Added module parameter panic_on_fatal which when set will cause the driver
to call panic() when an uncorrectable ECC error is detected.

Signed-off-by: Anders Berg <anders.berg@avagotech.com>
Merge branch 'aberg-next-3.4' into standard/preempt-rt/lsi/base