Fix one bug in the latest incarnation of r209843 -- combining GEPs
across PHI nodes. The code was computing the Idxs from the 'GEP'
variable's indices when what it wanted was Op1's indices. This caused an
ASan heap-overflow for me that pin pointed the issue when Op1 had more
indices than GEP did. =] I'll let Louis add a specific test case for
this if he wants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209857 91177308-0d34-0410-b5e6-96231b3b80d8
And fix my fix to sink down through the type at the right time. My
original fix would actually trigger the *exact* same crasher as the
original bug for a different reason. Awesomesauce.

Working on test cases now, but wanted to get bots healthier.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209860 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Auto-upgrade AVX1 vbroadcast intrinsics

They are replaced with the same IR that is generated for the
vector-initializers in avxintrin.h.

The test verifies that we get back the original instruction.  I haven't seen
this approach to be used in other auto-upgrade tests (i.e. llc + FileCheck)
but I think it's the most direct way to test this case.  I believe this should
work because llc upgrades calls during parsing.  (Other tests mostly check
that assembling and disassembling yields the upgraded IR.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209863 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Remove AVX1 vbroadcast intrinsics

The corresponding CFE patch replaces these intrinsics with vector initializers
in avxintrin.h.  This patch removes the LLVM intrinsics from the backend.

We now stop lowering at X86ISD::VBROADCAST custom node rather than lowering
that further to the intrinsics.

The patch only changes VBROADCASTS* and leaves VBROADCAST[FI]128 to continue
to use intrinsics.  As explained in the CFE patch, the reason is that we
currently don't generate as good code for them without the intrinsics.

CodeGen/X86/avx-vbroadcast.ll already provides coverage for this change.  It
checks that for a series of insertelements we generate the appropriate
vbroadcast instruction.

Also verified that there was no assembly change in the test-suite before and
after this patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209864 91177308-0d34-0410-b5e6-96231b3b80d8
[X86] Move test from r209863 to CodeGen/X86

We should only run this if X86 is in the targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209866 91177308-0d34-0410-b5e6-96231b3b80d8
When analyzing params/args for readnone/readonly, don't forget to consider that a pointer argument may be passed through a callsite to the return, and that we may need to analyze it. Fixes a bug reported on llvm-dev: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-May/073098.html


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209870 91177308-0d34-0410-b5e6-96231b3b80d8
Remove use of comma operator.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209871 91177308-0d34-0410-b5e6-96231b3b80d8
Add a trivial ArrayRef helper overload to the SelectionDAG interface.
I'm using this pretty frequently in a patch I'm working on and it seems
generally useful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209872 91177308-0d34-0410-b5e6-96231b3b80d8
Allow vectorization of intrinsics such as powi,cttz and ctlz in Loop and SLP Vectorizer.

This patch adds support to vectorize intrinsics such as powi, cttz and ctlz in Vectorizer. These intrinsics are different from other
intrinsics as second argument to these function must be same in order to vectorize them and it should be represented as a scalar.
Review: http://reviews.llvm.org/D3851#inline-32769 and http://reviews.llvm.org/D3937#inline-32857


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209873 91177308-0d34-0410-b5e6-96231b3b80d8
Test cases named with dates is a legacy rule not used now. Rename several test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209877 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64 & ARM: remove undefined behaviour from some tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209880 91177308-0d34-0410-b5e6-96231b3b80d8
ARM & AArch64: make use of common cmpxchg idioms after expansion

The C and C++ semantics for compare_exchange require it to return a bool
indicating success. This gets mapped to LLVM IR which follows each cmpxchg with
an icmp of the value loaded against the desired value.

When lowered to ldxr/stxr loops, this extra comparison is redundant: its
results are implicit in the control-flow of the function.

This commit makes two changes: it replaces that icmp with appropriate PHI
nodes, and then makes sure earlyCSE is called after expansion to actually make
use of the opportunities revealed.

I've also added -{arm,aarch64}-enable-atomic-tidy options, so that
existing fragile tests aren't perturbed too much by the change. Many
of them either rely on undef/unreachable too pervasively to be
restored to something well-defined (particularly while making sure
they test the same obscure assert from many years ago), or depend on a
particular CFG shape, which is disrupted by SimplifyCFG.

rdar://problem/16227836

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209883 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64 & ARM: disable generic test that relies on no CFG changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209885 91177308-0d34-0410-b5e6-96231b3b80d8
MachO: support N_INDR aliases in assembly files.

This makes LLVM create N_INDR aliases (to be resolved by the linker) when
appropriate.

rdar://problem/15125513

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209894 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: use AAPCS-style prologues for embedded MachO.

Darwin prologues save their GPRs in two stages: a narrow push of r0-r7 & lr,
followed by a wide push of the remaining registers if there are any. AAPCS uses
a single push.w instruction.

It turns out that, on average, enough registers get pushed that code is smaller
in the AAPCS prologue, which is a nice property for M-class programmers. They
also have other options available for back-traces, so can hopefully deal with
the fact that FP & LR aren't adjacent in memory.

rdar://problem/15909583

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209895 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG: skip barriers for unordered atomic operations

Unordered is strictly weaker than monotonic, so if the latter doesn't have any
barriers then the former certainly shouldn't.

rdar://problem/16548260

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209901 91177308-0d34-0410-b5e6-96231b3b80d8
[pr19636]  Fix known bit computation in urem instruction with power of two.
Patch by Andrey Kuharev.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209902 91177308-0d34-0410-b5e6-96231b3b80d8
PR19753: Optimize comparisons with "ashr exact" of a constanst.

Patch by suyog sarda.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209903 91177308-0d34-0410-b5e6-96231b3b80d8
MachO: move test to ARM directory.

This test specifies an ARM triple, so it needs ARM as a registered
target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209905 91177308-0d34-0410-b5e6-96231b3b80d8
Fix MIPS exception personality encoding.

For MIPS, we have to encode the personality routine with
an indirect pointer to absptr; otherwise, some link warning
warning will be raised, and the program might crash in some
early MIPS Android device.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209907 91177308-0d34-0410-b5e6-96231b3b80d8