AnyKernel2: sync static binaries from my repo
https://github.com/osm0sis/AnyKernel2/commit/18a10def08db203325ec1cfa9a7612161ae194ef
ramdisk+AnyKernel2: synapse: add lockstate write safety checks
AnyKernel2 zip
Makefile changes

Conflicts:
	arch/arm/boot/zImage
more makefile tweaks

Conflicts:
	arch/arm/boot/zImage
AnyKernel2: sync updated binaries and board support from my repo
https://github.com/osm0sis/AnyKernel2/commit/9b79d069e443f1d7dd9c3f7af54340a
ARM: OMAP4: l2x0: Cleanup prefetch offset register setting

The bits [31:5] of Prefetch Offset Register are reserved in
PL310 r2p0 so they should be kept unchanged.
It's enough to set Data prefetch enable bit in PL310 auxiliary
control register to enable the feature, so setting of bit 28 of POR
is removed.
Before writing POR value, the bits [4:0] has to be cleared to remove
previous value.

Change-Id: Id5d047da0daa0c841c69d4d587d2280d2f3433f9
Signed-off-by: Konstantin Shlyakhovoy <x0155534@ti.com>

Conflicts:

	arch/arm/mach-omap2/omap4-common.c
ARM: OMAP4: l2x0: Set optimized value for prefetch offset

Tuning the value of prefetch offset register of PL310 cache controller
for OMAP4 family. The patch can give up to 4% better results in low level
benchmarks (like bw_mem at block size above 2 Mb) and up to 2% in benchmarks
imitating use cases (like Sunspider).
Note: if double line fill is enabled, the optimal value can be different.

Change-Id: Iba7b7b5950981b851c4eac4ed636ec5d8006c87b
Signed-off-by: Konstantin Shlyakhovoy <x0155534@ti.com>
Add FIFO scheduler

Does not perform any merging or reordering -- pure FCFS.

Signed-off-by: Aaron Carroll <aaronc@gelato.unsw.edu.au>

Conflicts:
	block/Makefile
Fix FIFO compiling
Fix up
Add a bunch of cpu governors

Conflicts:
	drivers/cpufreq/cpufreq_pegasusq.c
Add FIFO I/O Scheduler to configs
update defconfig