[mips] Use __clear_cache builtin instead of cacheflush() in Unix Memory::InvalidateInstructionCache()

MIPS64 Android bionic has removed cacheflush(). Use __clear_cache() instead for 32-bit and 64-bit MIPS

Patch by Duane Sand <Duane.Sand@imgtec.com>



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211588 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Added support for assembling sdbbp.

Summary:
This instruction is re-encoded in MIPS32r6/MIPS64r6 without changing the
restrictions. We hadn't implemented it for earlier ISA's so it has been added to those too.

Differential Revision: http://reviews.llvm.org/D4265


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211590 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r211287, "Remove support for LLVM runtime multi-threading."

libclang still requires it on cygming, lack of incomplete <mutex>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211592 91177308-0d34-0410-b5e6-96231b3b80d8
Revert: r211588 - [mips] Use __clear_cache builtin instead of cacheflush() in Unix Memory::InvalidateInstructionCache()

Buildbot reports a test failure on the llvm-mips-linux builder and blames r211588.
Although it doesn't appear in the blamelist, it seems it could also be r211587
(because it's committed to compiler-rt?) since they were tested together.

Reverting the most likely suspect (r211588) to confirm one way or the other.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211594 91177308-0d34-0410-b5e6-96231b3b80d8
Pass a unique_ptr<MemoryBuffer> to the constructors in the  Binary hierarchy.

Once the objects are constructed, they own the buffer. Passing a unique_ptr
makes that clear.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211595 91177308-0d34-0410-b5e6-96231b3b80d8
Replace two release calls with std::move. I missed this on the previous commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211597 91177308-0d34-0410-b5e6-96231b3b80d8
Remove an empty directory left after r211508.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211600 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: Fix TPsoft for Thumb mode

Reviewed at http://reviews.llvm.org/D4230



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211601 91177308-0d34-0410-b5e6-96231b3b80d8
CodeGen: Avoid multiple strlen calls

Use a StringRef to hold our section prefix.  This avoids multiple calls
to strlen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211602 91177308-0d34-0410-b5e6-96231b3b80d8
Resubmit commit r211533

"Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64"
Missed files are added in this commit.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211605 91177308-0d34-0410-b5e6-96231b3b80d8
Add new debug kind LocTrackingOnly.

Summary:
This new debug emission kind supports emitting line location
information in all instructions, but stops code generation
from emitting debug info to the final output.

This mode is useful when the backend wants to track source
locations during code generation, but it does not want to
produce debug info. This is currently used by optimization
remarks (-pass-remarks, -pass-remarks-missed and
-pass-remarks-analysis).

To prevent debug info emission, DIBuilder never inserts the
annotation 'llvm.dbg.cu' when LocTrackingOnly is enabled.

Reviewers: echristo, dblaikie

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D4234

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211609 91177308-0d34-0410-b5e6-96231b3b80d8
Fix test case in r211605/r211533

The test case in
"Fix PR20056: Implement pseudo LDR <reg>, =<literal/label> for AArch64" should
only work with Linux.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211613 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Move pattern to instruction definition

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211614 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Remove DIV_INF

This corresponded to an amdil instruction which there is
a 2 instruction equivalent for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211616 91177308-0d34-0410-b5e6-96231b3b80d8
vpblend intrinsics combines as shifts intrinsics due to absence return stmt between them
Fix PR20088

Differential Revision: http://reviews.llvm.org/D4277


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211617 91177308-0d34-0410-b5e6-96231b3b80d8
[PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction)

PR20071 identifies a problem in PowerPC's fast-isel implementation for
floating-point conversion to integer.  The fctiduz instruction was added in
Power ISA 2.06 (i.e., Power7 and later).  However, this instruction is being
generated regardless of which 64-bit PowerPC target is selected.

The intent is for fast-isel to punt to DAG selection when this instruction is
not available.  This patch implements that change.  For testing purposes, the
existing fast-isel-conversion.ll test adds a RUN line for -mcpu=970 and tests
for the expected code generation.  Additionally, the existing test
fast-isel-conversion-p5.ll was found to be incorrectly expecting the
unavailable instruction to be generated.  I've removed these test variants
since we have adequate coverage in fast-isel-conversion.ll.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211627 91177308-0d34-0410-b5e6-96231b3b80d8
Fix up scoping in a few tests (and delete one that validates unnecessary behavior).

Most of this is just tests that were silently succeeding in spite of
schema changes I made over a year ago. Cleaning them up as they lead to
failures in a change I'm working on/will come soon.

test/DebugInfo/2010-01-19-DbgScope.ll was removed as it tested miscoping
where a DebugLoc described a location not in the current function. The
test case doesn't describe why this is a valid situation and should be
supported, so I'm removing it and shortly going to commit changes that
make this firmly unsupported/assert-fail.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211628 91177308-0d34-0410-b5e6-96231b3b80d8
fixed a few typos in comments


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211634 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Fix inconsistency in rsq instructions.

R600 was using a clamped version of rsq, but SI was not. Add a
new rsq_clamped intrinsic and use them consistently.

It's unclear to me from the documentation what behavior
the R600 instructions have, so I assume they have the legacy behavior
described by the SI documents. For R600, use RECIPSQRT_IEEE
for both llvm.AMDGPU.rsq.legacy and llvm.AMDGPU.rsq. R600 also
has RECIPSQRT_FF, which I'm not sure how it fits in here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211637 91177308-0d34-0410-b5e6-96231b3b80d8
Print a=b as an assignment.

In assembly the expression a=b is parsed as an assignment, so it should be
printed as one.

This remove a truly horrible hack for producing a label with "a=.". It would
be used by codegen but would never be reached by the asm parser. Sorry I
missed this when it was first committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211639 91177308-0d34-0410-b5e6-96231b3b80d8