OMAP2+: clock: Fix DPLL clock rounding

Function omap2_dpll_round_rate() succeeds only if it can find exact frequency.
But in current implmentations there are some frequencies that can't be rounded.
Function iterates frequencies that always lower than requested one.
For example 550MHz can be obtain from 38.4MHz reference by M=1375 and N=96,
but the closest MN pair that is tried is 1374/96.

It happens because of flooring scaled_rt_rp variable insted of rounding.
This patch should fix the issue.

Change-Id: Iceadcc695ac3376372b2fdaf29afe8f9454b891f
Signed-off-by: Taras Kondratiuk <taras@ti.com>