add support for spi master

atm this is a big mess and I need to split the master and slave stuff
etc, but it works and the master and slave can talk to each other

I could not get the hardware NSS support on the stm32 working so I have
left it as a normal gpio pin. As a consquence of that I need to enable
the spi before writing into the fifo so, then set the NSS line low so
the clock line is set hi or lo (as configured in hw.c) when before the
NSS line goes low; this is a pain since I cannot stuff the Tx fifo with
bytes before enabling the spi which would be nice.

Otherwise this seems to work OK
split spi common, master, and slave modules

this keeps things tidier, but also allows the build to include just the
master spi or the slave spi etc.
oops ensure spi_irq is overridden when spis is included

I missed this is the last commit
add dma support for spi master transfers
clean up warnings from unused vars
Merge branch 'master' into stm32f373

Conflicts:
	utest/gpio/gpio_utest.c