network: Add help text for ifconfig
bsp/arm: Avoid warning
bsp/arm: SMP support for a9mpcore_clock_cleanup()
bsp/arm: Invalidate SCU
bsp/arm: Separate setup for translation table
bsp/arm: Add CP15 methods
bsp/arm: Add linker symbol bsp_processor_count
bsp/arm: Add arm-errata.h and arm-release-id.h
bsp/lpc32xx: Add arm-errata.h and arm-release-id.h
bsp/raspberrypi: Add arm-errata.h and arm-release-id.h
bsp/realview-pbx-a9: Add arm-errata.h and arm-release-id.h
bsp/xilinx-zynq: Add arm-errata.h and arm-release-id.h
bsp/arm: Add SCU errata handling for L2C-310 cache
bsp/arm: Add handling for level 2 L2C-310 cache controller

arm-l2c-310/cache_.h contains the handling for the L2C-310
level 2 cache controller from arm. It references the arm
level 1 cache handling in the new file arm-cache-l1.h.
libbsp/xilinx-zynq: Share handling for ARM cache controller L2C-310
libchip: Add dwmac 10/100/1000 network driver
bsp/altera-cyclone-v: New BSP

Implemented so far:
- nocache heap for uncached RAM
- basic timer
- level 1 cache handling for arm cache controller
  in arm-cache-l1.h
- level 2 L2C-310 cache controller
- MMU
- DWMAC 1000 ethernet controller
- basic errata handling
- smp startup for second core
bsp/altera-cyclone-v: Add Alteras hwlib

Add files from Alteras hwlib
bsp/altera-cyclone-v: Made hwlib compile clean

Made Alteras hwlib compile clean within the RTEMS build system