test addition as well as multiplication in CreekCoreSetup
rename waitrequest_n to ready
starting out on FPGA setup
move board-specific files into separate directories
trying to fix DDR3 setup
copy pins from reference file
get rid of megafunction ddr3
add a signal allowing processor to continue after a wait 0
create a nios system
redo pin assignments
add onchip memory for NIOS instruction memory
add bsp and test program
add timing file
add some helpful scripts
Data master should be connected to instruction memory in NIOS system
run.sh should run make first
first attempt at test program
expose some instrumentation to software
add further instrumentation
make sure selections are all initialized to 0 in SwitchController