- add support to Vivado 2014.2
- minor bugs fixed:
  - ip_prototype ZC706: Vivado project fails to compile due to bus name misspell
  - ip_design: removed "status" signal from IP used to tell the ARM processor when IP has completed the execution. Now ARM processor polls the AXI-slave "done" signal. Modified "echo.c" to poll "done" signal.
  - ip_design test: simulation fails with a segmentation fault when input vector are big (more then thousands) due to vectors allocation in "foo_test.cpp". Solved using dynamic memory allocation.