hp/pavilion_m6_1035dx: Put EC in APM mode before ACPI mode

The EC may disable some functionality, such as Caps Lock LED and
battery charging if it never receives a command to go in APM mode. The
workaround is to put it in APM mode before switching it to ACPI mode.

Change-Id: Iffaeb9a6f57841f456c4bce8337dc09b287f8758
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
[RFC] ec/compal/ene932: Update to use coreboot EC API

This is based on the EC-mainboard interaction draft specification [1]

Enjoy the clusterURL in clustercommit clustermessage.

[1] http://www.coreboot.org/ACPI/Board-EC_interaction#The_mainboard_namespace_method

Change-Id: If0b09be4f5e17cc444539a30f0186590fa0b72b5
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Implement ACPI for wireless toggle hotkey

Change-Id: I2e9ab68263648af8c9d46999e960f0a0711b61d7
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hp/pavilion_m6_1035dx: Implement MB.LIDS ACPI method

Change-Id: I654ca745f7404b86aa25fb2e696751d616d0ca03
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
usbdebug: Reduce bus reset delays

According to EHCI specification, host controller software stops
the USB Reset condition by writing PORT_RESET=0. Software then
poll-waits this bit until controller hardware has completed USB
Reset sequence and read returns with PORT_RESET==0.

Change-Id: I6033c4d904c2af9eb16f5f3c1eb825776648cc1d
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
usbdebug: Add optional quirk for old DIY debug part

Not sure what this is about. Required for FX2.

Change-Id: I86878f8f570911ed1ed3ec844c232ac91e934072
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
vendorcode/amd/agesa/fam15tn: Build as a static library

Up until now, we were building AGESA by specifying each AGESA source
file and adding it to the list of romstage and ramstage source files.
As a result, we were compiling each AGESA source twice, despite the
fact that it does not depend on the stage we're in.

Since AGESA is stage-independent, we can build it just once, and use
the resulting static library in both rom and ram stages.

We still keep the practice of specifying every single AGESA directory
as an include dir and adding the AGESA CFLAGS to our global CFLAGS;
this is needed due to the way AGESA builds.

Change-Id: I9b23264129d1c08cb67cabc31d15a68d43ed7624
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
southbridge/amd/agesa/hudson: Clean up AGESA #includes

NOTFORMERGE: EDIT commit message to include proper hash

Just like in commit
<HASH HERE> vendorcode/amd/agesa/fam15tn: Clean #includes in public headers

Include AGESA headers specifying the path relative to AGESA_ROOT. The
path is specified relative to AGESA_ROOT as opposed to src/ since this
code may include headers from different AGESA families, depending on
the board.

Change-Id: Ide38cc34e207a8b617d1d319fd9c17a785f55833
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
vendorcode/amd/agesa/fam15tn: Clean #includes in public headers

Right now, coreboot code using AGESA headers can only build if all the
AGESA path are given to the compiler via the "-I" option. This is sub-
optimal, as it requires us to have every AGESA source directory
specified as a compiler include path. This pollutes our global include
paths.

We restrict the compiler include paths to only allow "AGESA_ROOT/" and
"AGESA_ROOT/Include". We then modify the AGESA headers to specify
non-local include files relative to "AGESA_ROOT/Include".

We use the convention that includes relative to the directory of the
header are included as "path/to/header.h", while includes relative to
AGESA_ROOT are included as <path/to/header.h>.

This change allows building coreboot code based on AGESA with the
limited subset of include paths, but does not allow AGESA itself to
build with this restricted subset.

Change-Id: I31102273c8caa8d6b1d80774bfd35711825bec03
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
cpu/amd/agesa/s3_resume.c: Specify include paths from AGESA_ROOT

NOTFORMERGE

Include AGESA files with a path relative to AGESA_ROOT, following the
same reasoning as in commit
<HASH HERE> southbridge/amd/agesa/hudson: Clean up AGESA #includes

Change-Id: If15c4cbfd42e0264264fdb3e8c426a47609ad41f
signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
hudson boards: Don't require ide.asl file on boards without IDE

Not all boards which use the Hudson southbridge have IDE. However,
the southbridge's asl included an 'ide.asl' file which had to be
present in $(mainboard_dir)/acpi.

Address this issue by including ide.asl only in boards which have IDE,
and remove it from all other hudson boards.

Change-Id: Ie2efb7ebf8f5b527e26d7aaaeafbd3053a9a6b28
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add Compal KBC to devicetree

Change-Id: Id0bb77f2a8115fafc0cd6165a8431a7e07f0fac1
Remove irrelevant Kconfig options

Change-Id: I9b967a2d0a5dddc8341204dadeed90460251915c
NOTFORMERGE: Add SCI map

Change-Id: Ifa50bf000cfc8e77a6a4d84752f89838f165f7a0
NOTFORMERGE: Add tons of ACPI debug info

Change-Id: I2475ba04a5258f9d8af9b987a461ec2d5ab60135