ARM: partially handle 32-bit relocations for WoA

IMAGE_REL_ARM_MOV32T relocations require that the movw/movt pair-wise
relocation is not split up and reordered. When expanding the mov32imm
pseudo-instruction, create a bundle if the machine operand is referencing an
address.  This helps ensure that the relocatable address load is not reordered
by subsequent passes.

Unfortunately, this only partially handles the case as the Constant Island Pass
occurs after the instructions are unbundled and does not properly handle
bundles.  That is a more fundamental issue with the pass itself and beyond the
scope of this change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207608 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: move llvm_unreachable use

When building with -Werror=covered-switch-default (as on the buildbots), the
build would fail since all cases are covered by the switch.  Move the
llvm_unreachable to the end of the function as an annotation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207609 91177308-0d34-0410-b5e6-96231b3b80d8
De-virtualize or remove some methods that have no overrides nor override anything. In some cases remove all together if there are no callers either.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207610 91177308-0d34-0410-b5e6-96231b3b80d8
[C++11] Use 'nullptr' in tablegen output files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207611 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: print COFF function header for Windows on ARM

Emit the COFF header when printing out the function.  This is important as the
header contains two important pieces of information: the storage class for the
symbol and the symbol type information.  This bit of information is required for
the linker to correctly identify the type of symbol that it is dealing with.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207613 91177308-0d34-0410-b5e6-96231b3b80d8
ConstantHoisting.cpp: Add <tuple> for std::tie, since r207593 removed FileSystem.h, it includes <tuple>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207614 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: support stack probe emission for Windows on ARM

This introduces the stack lowering emission of the stack probe function for
Windows on ARM. The stack on Windows on ARM is a dynamically paged stack where
any page allocation which crosses a page boundary of the following guard page
will cause a page fault. This page fault must be handled by the kernel to
ensure that the page is faulted in. If this does not occur and a write access
any memory beyond that, the page fault will go unserviced, resulting in an
abnormal program termination.

The watermark for the stack probe appears to be at 4080 bytes (for
accommodating the stack guard canaries and stack alignment) when SSP is
enabled.  Otherwise, the stack probe is emitted on the page size boundary of
4096 bytes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207615 91177308-0d34-0410-b5e6-96231b3b80d8
Use makeArrayRef insted of calling ArrayRef<T> constructor directly. I introduced most of these recently.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207616 91177308-0d34-0410-b5e6-96231b3b80d8
Add a <tuple> include to more files that aren't getting it transitively on MSVC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207617 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Actually test the *basic* edge removal bits (IE, the non-SCC
bits), and discover that it's totally broken. Yay tests. Boo bug. Fix
the basic edge removal so that it works by nulling out the removed edges
rather than actually removing them. This leaves the indices valid in the
map from callee to index, and preserves some of the locality for
iterating over edges. The iterator is made bidirectional to reflect that
it now has to skip over null entries, and the skipping logic is layered
onto it.

As future work, I would like to track essentially the "load factor" of
the edge list, and when it falls below a threshold do a compaction.

An alternative I considered (and continue to consider) is storing the
callees in a doubly linked list where each element of the list is in
a set (which is essentially the classical linked-hash-table
datastructure). The problem with that approach is that either you need
to heap allocate the linked list nodes and use pointers to them, or use
a bucket hash table (with even *more* linked list pointer overhead!),
etc. It's pretty easy to get 5x overhead for values that are just
pointers. So far, I think punching holes in the vector, and periodic
compaction is likely to be much more efficient overall in the space/time
tradeoff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207619 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: make sure FastISel uses a GPR64 source in 64-bit extensions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207620 91177308-0d34-0410-b5e6-96231b3b80d8
raw_ostream::operator<<(StringRef): Avoid potential overflow in pointer arithmetic.

(OutBufCur + Size) might overflow if Size were large. For example on i686-linux,

  OutBufCur: 0xFFFDF27D
  OutBufEnd: 0xFFFDF370
  Size:      0x0002BF20 (180,000)

It caused flaky error in MC/COFF/section-name-encoding.s.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207621 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Ensure arm64_be is dealt with when emitting debug info.

This is a partial port of r204816 (cpirker "Elf support for MC-JIT
runtime dynamic linker") from AArch64 to ARM64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207625 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Try and make the ELF MCJIT *slightly* less broken for ARM64.

A bunch of switch cases were missing, not just for ARM64 but also for
AArch64_BE. I've fixed all those, but there's zero testing as
ExecutionEngine tests are disabled when crosscompiling and I don't
have a native platform available to test on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207626 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Fix stupid copy-pasto in ARM64MCAsmInfo.cpp - aarch64_be -> arm64_be

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207627 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Simplify if condition.

v2f32 and v4f32 were missed out of these conditions, so this is also
a bugfix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207628 91177308-0d34-0410-b5e6-96231b3b80d8
Fix multiline comment warning.

../unittests/Analysis/LazyCallGraphTest.cpp:45:1: warning: multi-line comment [-Wcomment]
 //        /  \
 ^


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207629 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Add the really, *really* boring edge insertion case: adding an
edge entirely within an existing SCC. Shockingly, making the connected
component more connected is ... a total snooze fest. =]

Anyways, its wired up, and I even added a test case to make sure it
pretty much sorta works. =D

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207631 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: print canonical syntax for add/sub (imm) instructions.

Since these instructions only accept a 12-bit immediate, possibly shifted left
by 12, the canonical syntax used by the architecture reference manual is "#N {,
lsl #12 }". We should accept an immediate that has already been shifted, (e.g.

Also, print a comment giving the full addend since it can be helpful.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207633 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: hexify printing various immediate operands

This is mostly aimed at the NEON logical operations and MOVI/MVNI (since they
accept weird shifts which are more naturally understandable in hex notation).

Also changes BRK/HINT etc, which is probably a neutral change, but easier than
the alternative.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207634 91177308-0d34-0410-b5e6-96231b3b80d8