[FastISel][AArch64] Add MachO large code model support for function calls.

Currently the large code model for MachO uses the GOT to make function calls.
Emit the required adrp and ldr instructions to load the address from the GOT.

Related to <rdar://problem/17733076>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214381 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Update and enable patchpoint and stackmap intrinsic tests for FastISel.

This commit updates the existing SelectionDAG tests for the stackmap and patchpoint
intrinsics and enables FastISel testing. It also splits up the tests into separate
files, due to different codegen between SelectionDAG and FastISel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214382 91177308-0d34-0410-b5e6-96231b3b80d8
Fix some grammatical errors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214383 91177308-0d34-0410-b5e6-96231b3b80d8
InstSimplify: Simplify (X - (0 - Y)) if the second sub is NUW

If the NUW bit is set for 0 - Y, we know that all values for Y other
than 0 would produce a poison value.  This allows us to replace (0 - Y)
with 0 in the expression (X - (0 - Y)) which will ultimately leave us
with X.

This partially fixes PR20189.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214384 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: Correctly propagate NSW/NUW for x-(-A) -> x+A

We can only propagate the nsw bits if both subtraction instructions are
marked with the appropriate bit.

N.B.  We only propagate the nsw bit in InstCombine because the nuw case
is already handled in InstSimplify.

This fixes PR20189.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214385 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Add sqrt intrinsic support.

Fixes <rdar://problem/17867067>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214388 91177308-0d34-0410-b5e6-96231b3b80d8
[FastISel][AArch64] Add basic bitcast support for conversion between float and int.

Fixes <rdar://problem/17867078>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214389 91177308-0d34-0410-b5e6-96231b3b80d8
MergeFunctions, tiny refactoring:
cmpOperation has been renamed to cmpOperations (multiple form).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214392 91177308-0d34-0410-b5e6-96231b3b80d8
[asan] Support x86 REP MOVS asm instrumentation.

Patch by Yuri Gorshenin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214395 91177308-0d34-0410-b5e6-96231b3b80d8
[msan] Fix handling of array types.

Switch array type shadow from a single integer to
an array of integers (i.e. make it per-element).
This simplifies instrumentation of extractvalue and fixes PR20493.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214398 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing a -Wcast-qual warning in GCC. No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214399 91177308-0d34-0410-b5e6-96231b3b80d8
Fixing an -Woverloaded-virtual warnings by exposing the hidden virtual function as well. No functional changes intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214400 91177308-0d34-0410-b5e6-96231b3b80d8
Add PowerPC release notes for 3.5.

Here's my take on 3.5 changes for PowerPC.  Others please feel free to add,
edit, delete as desired.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214403 91177308-0d34-0410-b5e6-96231b3b80d8
Release Notes: Overriding PPC64 and PPC64LE ABI defaults is not yet supported.

I wrongly included a description of a patch that came in after 3.5 branched
and has not been backported.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214404 91177308-0d34-0410-b5e6-96231b3b80d8
Wrong heading level for PowerPC changes in release notes

Oops.  Used the wrong heading level by mistake.

Thanks,
Bill

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214405 91177308-0d34-0410-b5e6-96231b3b80d8
Fix loop end condition.

Note: This code appears to be untested.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214416 91177308-0d34-0410-b5e6-96231b3b80d8
UseListOrder: Handle self-users

Correctly sort self-users (such as PHI nodes).  I added a targeted test
in `test/Bitcode/use-list-order.ll` and the final missing RUN line to
tests in `test/Assembly`.

This is part of PR5680.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214417 91177308-0d34-0410-b5e6-96231b3b80d8
Create a default symver on Linux like ELF OSes.

Patch by Adam Jackson.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214418 91177308-0d34-0410-b5e6-96231b3b80d8
verify-uselistorder: Change the default -num-shuffles=5

Change the default for `-num-shuffles` to 5 and better document the
algorithm in the header docs of `verify-uselistorder`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214419 91177308-0d34-0410-b5e6-96231b3b80d8
Fix ScalarEvolutionExpander when creating a PHI in a block with duplicate predecessors

It seems that when I fixed this, almost exactly a year ago, I did not quite do
it correctly. When we have duplicate block predecessors, we can indeed not have
different incoming values for the same block, but we *must* have duplicate
entries. So, instead of skipping the duplicates, we explicitly add the
duplicate incoming values.

Fixes PR20442.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214423 91177308-0d34-0410-b5e6-96231b3b80d8