wcnss: Sample WCNSS TOP AHB clock on WCNSS WDOG bite

Sample the wcss_top_ahb_clk and determine whether or not the clock freq
is zero when the issue occurs. This will help confirm the reason for
the system reset when Apps tries to access PMU registers for logging
purposes.

Change-Id: Ia4f34a38b7e8d237b9e5ae935d9ce339ca2d6ed1
Signed-off-by: Yue Ma <yuem@codeaurora.org>
ARM: dts: msm: support qseecom bus scaling in msm8226

To support qseecom bus scaling, ab & ib values are changed to set four
bandwidth levels: "INACTIVE, LOW, MEDIUM and HIGH" with corresponding
bus bandwidth of {0M, 0M, 150M, 492M}; and the flag of support-bus-scaling
is also set to one.

Signed-off-by: Zhen Kong <zkong@codeaurora.org>
ASoC: msm: qdsp6v2: Release IPA mapping

When DSP has a SMMU associated with it, audio driver will allocate
(KVA)kernel virtual address and (IPA)intermediate physical
address.When freeing memory audio driver should release IPA and KVA
mappings. Change fixes the issue where IPA mapping was not released

Change-Id: I9487ac69e509d509593d0bef00edc55c9847945a
CRs-fixed: 600938
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
msm: pil-pronto: Move wcnss log on wdog bite function into a workqueue

The clock APIs called by wcnss log on wdog bite function may block wcnss
wdog bite interrupt handler, hence move the function into a workqueue.

CRs-Fixed: 608799
Change-Id: I23252f8cf3894e11c5479a96867fb5168ac7e7b5
Signed-off-by: Yue Ma <yuem@codeaurora.org>
arm: dts: msm8610: Add support for 8510/8512

Identify 8510 and 8512 chips as belonging to the same class
of chips as 8610.

CRs-fixed: 619299
Change-Id: I5bae8770dfaf18b2da25a66bd804a26d3dcb430e
Signed-off-by: Hanumant Singh <hanumant@codeaurora.org>
qseecom: Validate the pointer returned by ion_import_dma_buf

Do a "IS_ERR_OR_NULL" check for the return value of
ion_import_dma_buf.

Change-Id: Iaac8b59b1f076d002430e0e6aba055bd88c83ed7
Signed-off-by: Hariprasad Dhalinarasimha <hnamgund@codeaurora.org>
mmc: block: check for NULL pointer before dereferencing

mmc block data can be NULL. Hence, check for NULL before
dereferencing md.

CRs-Fixed: 562259
Change-Id: I0182c216ec73347cdd2ea464f593839fffd242a9
Signed-off-by: Asutosh Das <asutoshd@codeaurora.org>
ARM: dts: msm: optimize CPR configurations for msm8226-v1/v2 and msm8926

Move common CPR regulator configurations for msm8226-v1, msm8226-v2, and
msm8926 into msm8226-regulator.dtsi. Move msm8226-v1 specific
configurations into msm8226-v1.dtsi since most CPR configuration parameters
are common between msm8226-v2 and msm8926.

Change-Id: I043a310aa433ba8f8cf4dd17dc1ef99de1f99b89
Signed-off-by: Ke Liu <keliu@codeaurora.org>
msm: cpr-regulator: modify how initial voltages and limits are specified

Currently, the initial voltage as well as the CPR ceiling and floor
voltages for each voltage corner are defined using these four device tree
properties: qcom,pvs-init-voltage, qcom,pvs-corner-ceiling-slow,
qcom,pvs-corner-ceiling-nom, and qcom,pvs-corner-ceiling-fast.
Unfortunately, since qcom,pvs-init-voltage only defines the initial
voltage for the turbo voltage corner for each PVS bin value, the initial
voltage used for the SVS and nominal corners must be calculated using a
complicated and potentially error prone algorithm using the four properties
mentioned earlier. Furthermore, the coarse slow/nom/fast binning leads to
wasted power for parts with intermediate PVS bin defined initial voltage
requirements when the CPR controller is disabled.

Therefore, replace the four properties listed above with the following
three properties: qcom,pvs-voltage-table, qcom,cpr-voltage-ceiling and
qcom,cpr-voltage-floor. The property qcom,pvs-voltage-table specifies a
mapping from a PVS bin value to the initial voltage for each voltage
corner. The properties qcom,cpr-voltage-ceiling and qcom,cpr-voltage-floor
specify the ceiling and floor for each voltage corner respectively.

Also, remove all usage of 'process' from inside of the cpr-regulator driver
since it has no meaning without the qcom,pvs-corner-ceiling-slow/nom/fast
properties.

CRs-Fixed: 606213
Change-Id: I7996074b39e1f80f6dc10e25428e09d7cb364192
Signed-off-by: Ke Liu <keliu@codeaurora.org>
Merge "ARM: dts: msm: optimize CPR configurations for msm8226-v1/v2 and msm8926"
Merge "msm: cpr-regulator: modify how initial voltages and limits are specified"
Merge "wcnss: Sample WCNSS TOP AHB clock on WCNSS WDOG bite"
Merge "msm: pil-pronto: Move wcnss log on wdog bite function into a workqueue"
msm: msm_bus: Change priority overrides based on master configuration

When BIMC master enables BKE (in limiter mode), priority override
should be disabled since master is getting limited bandwidth.
However when BKE is disabled, make sure priority overrides are enabled
if master is in fixed mode.
Also enable the bke bit as part of switching QOS modes.

Change-Id: I318b3542f3f5da5685d5641701e0b6c8fc64732c
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
Merge "ARM: dts: msm: support qseecom bus scaling in msm8226"
Merge "qseecom: Validate the pointer returned by ion_import_dma_buf"
Merge "msm: msm_bus: Change priority overrides based on master configuration"
Merge "ASoC: msm: qdsp6v2: Release IPA mapping"
msm: msm_bus: Arbitrate IB for dual config masters

Arbitrate the IBs on nodes marked as dual config. This will prevent cases
where the last client's requests is always used to apply dual config rules.

Change-Id: I06f9a16e5f32c1cda7a5d04a72a6e5cf7dc9fae6
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Merge "arm: dts: msm8610: Add support for 8510/8512"